component

CY2308SXI-1HT

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by Ray

Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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CY2308SXI-1HT

Infineon Cypress Semicon · Clock Buffers, Drivers, Distributors · SOIC-16

CY2308SXI-1HT from Infineon Cypress Semicon, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Input reference frequency. PLL reference clock input, 10 MHz to 133 MHz. Has a weak pull-down. DC input voltage rating -0.5 V to 7 V (tolerant beyond VDD unlike other inputs).
2 CLKA1 output Clock output, Bank A. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding.
3 CLKA2 output Clock output, Bank A. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding.
4 VDD power_in Power supply voltage. 3.0 V to 3.6 V nominal (3.3 V typ). Both VDD pins (4 and 13) must be tied to the same rail and adequately decoupled.
5 GND power_in Power supply ground. Tie to system ground; both GND pins (5 and 12) should be connected.
6 CLKB1 output Clock output, Bank B. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding. Bank B is three-stated when Bank A is driven and no B output is required.
7 CLKB2 output Clock output, Bank B. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding.
8 S2 input Select input, bit 2. Together with S1 selects PLL vs reference output source, output-bank tri-state, and PLL shutdown per the Select Input Decoding table. Has a weak pull-up.
9 S1 input Select input, bit 1. Together with S2 selects PLL vs reference output source, output-bank tri-state, and PLL shutdown per the Select Input Decoding table. Has a weak pull-up.
10 CLKB3 output Clock output, Bank B. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding.
11 CLKB4 output Clock output, Bank B. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding.
12 GND power_in Power supply ground. Tie to system ground; both GND pins (5 and 12) should be connected.
13 VDD power_in Power supply voltage. 3.0 V to 3.6 V nominal (3.3 V typ). Both VDD pins (4 and 13) must be tied to the same rail and adequately decoupled.
14 CLKA3 output Clock output, Bank A. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding.
15 CLKA4 output Clock output, Bank A. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding.
16 FBK input PLL feedback input. Connect one of the eight CLKA/CLKB outputs externally to this pin to close the PLL loop. The relative loading of the FBK-driving output vs the remaining outputs adjusts input-to-output delay (see Zero Delay and Skew Control).

Key specifications

Parameter Value
Manufacturer Infineon Cypress Semicon
Package SOIC-16
Category Clock/Timing
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • CY2308SXI-1HT
  • CY2308SXI-1HTSXC-1H
  • CY2308SXI-1HTZXI-1H
  • CY2308SXI-1HTZXC-1H

CAD (KiCad official)

  • Symbol: CY2308SXI-1HT
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Cypress Semicon datasheet (21 pp, sha256 4dfef64c4212e853, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF