COS3525AP from COSINE, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	INV Input	input	Inverting input to the internal error amplifier. Used for feedback voltage sensing in the control loop.
2	NI Input	input	Non-inverting input to the internal error amplifier. Common-mode range includes the 5.1V reference, eliminating external divider resistors.
3	SYNC	input	Oscillator sync terminal. Allows multiple units to be slaved or a single unit to be synchronized to an external system clock. Sync threshold ~2V (1.2V min, 2.8V max).
4	OSC Output	output	Oscillator output. Provides a clock signal (typically ~4V amplitude, 0.5µs width) used to synchronize additional slave devices.
5	CT	passive	Timing capacitor connection pin for oscillator frequency programming (recommended 0.001-0.01 µF). Should be connected to device ground using minimal trace length.
6	RT	passive	Timing resistor connection pin for oscillator frequency programming. Recommended range 2-150 kΩ. Sets oscillator charging current together with CT.
7	Discharge	passive	Discharge terminal. A single resistor (0-500 Ω) between CT and Discharge provides adjustable dead-time control between the two outputs.
8	Soft Start	passive	Soft-start input pin. Connect an external capacitor to ground; it is charged by an internal 50 µA current source to slowly ramp up the duty cycle at startup.
9	Compensation	output	Output of the error amplifier, used for external loop compensation network attachment. Also can be pulled down (sinking ≥100 µA) to disable the outputs.
10	Shutdown	input	Shutdown control. Pull high (threshold ~0.8V, 0.6-1.0V) to shut down the PWM outputs. Should not be left floating. Provides instantaneous turn-off via the PWM latch on pulsed shutdown, and soft-start recycle on longer shutdown commands.
11	Output A	output	Output A of the on-chip totem-pole drive stage. Capable of sourcing/sinking >200 mA (500 mA absolute max). NOR-logic output on COS3525A (LOW when OFF).
12	Ground	power_in	Ground return pin for both signal and power stages.
13	VC	power_in	Collector supply for the output driver stage (4.5V to 40V operating). Should be bypassed with a 0.1 µF low-ESL ceramic capacitor placed with minimal trace length.
14	Output B	output	Output B of the on-chip totem-pole drive stage. Capable of sourcing/sinking >200 mA (500 mA absolute max). Alternates with Output A. NOR-logic output on COS3525A.
15	+VIN	power_in	Main supply voltage input (8V to 40V operating, 41V absolute max). Powers the internal reference, oscillator and control logic.
16	VREF	power_out	5.1V reference output (trimmed to 1%, load capability up to 20 mA). Bypass with a 0.1 µF low-ESL ceramic capacitor with a minimal trace to the ground plane.

Key specifications

Parameter	Value
Manufacturer	COSINE
Package	SOP-16
Category	PMIC
Pins	16

Ordering variants

Same part, different packaging or reel option.

COS3525AP
COS3527AP
COS3525AT
COS3527AT
COS3525AD
COS3527AD

CAD (KiCad official)

Symbol: COS3525AP
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`cos3525ap.step`	217 KB	You want the bare part, or you mark your own boards.
`cos3525ap-etched.step`	2.6 MB	You want the part with `COS3525AP` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 631 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: COSINE datasheet (10 pp, sha256 9d9ff0dfc3e82fba, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF