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ch347t

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WCH Jiangsu Qin Heng USB Converters, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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CH347T

WCH Jiangsu Qin Heng · USB Converters · TSSOP-20

CH347T from WCH Jiangsu Qin Heng, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RST# input External reset input, active low. Internal pull-up resistor (~30-60 kΩ). Tie to VCC through an RC network or drive from a supervisor; leave open for internal power-on reset.
2 CTS1/GPIO6 bidirectional Mode 0/1/2/3: UART1 MODEM input, Clear-To-Send, active low, 5V tolerant. Also usable as general-purpose GPIO6 in mode 0.
3 TXD1 output UART1 serial data output. Idle state is high. Present in all four operating modes.
4 RXD1 input UART1 serial data input, 5V tolerant, internal pull-up resistor. Present in all four operating modes.
5 DSR0/GPIO2/SCS0/TMS bidirectional Mode 0: UART0 DSR MODEM input (active low, 5V tolerant) or GPIO2. Mode 1/2: SPI chip-select 0 output (SCS0). Mode 3: JTAG TMS mode-select output. Function chosen by CH347T operating mode.
6 CTS0/GPIO0/SCK/TCK bidirectional Mode 0: UART0 CTS MODEM input (active low, 5V tolerant) or GPIO0. Mode 1/2: 4-wire SPI clock output SCK/DCK. Mode 3: JTAG TCK clock output.
7 RTS0/GPIO1/MISO/TDO bidirectional Mode 0: UART0 RTS MODEM output (active low) or GPIO1. If a pull-down is detected on this pin at power-up the internal EEPROM parameters are ignored and default parameters are used. Mode 1/2: SPI MISO/SDI/DIN data input (5V tolerant, internal pull-up). Mode 3: JTAG TDO data input.
8 TXD0/MOSI/TDI bidirectional Mode 0: UART0 serial data output TXD0 (idle high). Mode 1/2: 4-wire SPI MOSI/SDO/DOUT data output. Mode 3: JTAG TDI data output.
9 TNOW0/DTR0/GPIO5/SCS1/TRST bidirectional Mode 0: UART0 DTR MODEM output (active low), RS485 TX/RX enable, or GPIO5. If DTR0 detects an external pull-down at power-up, DTR0 and DTR1 switch to TNOW0 and TNOW1 (transmit-status indicators for RS485 direction control). Mode 1/2: second SPI chip-select output SCS1. Mode 3: JTAG TRST reset output.
10 TNOW1/DTR1 bidirectional At reset, sampled as MODE0 configuration strap (with pin 13) to select the operating mode; internal pull-up, 5V tolerant. After reset: UART1 DTR MODEM output (active low) / RS485 TX/RX enable, or TNOW1 status output if the DTR0 strap selected TNOW mode.
11 RI0/GPIO3/SCL bidirectional Mode 0: UART0 RI (ring indicator) MODEM input (active low, 5V tolerant), or GPIO3. Mode 1/2: I2C clock output SCL (open-drain, internal pull-up). Mode 3: general-purpose GPIO.
12 RXD0/SDA bidirectional Mode 0: UART0 serial data input RXD0 (5V tolerant, internal pull-up). Mode 1/2: I2C bidirectional data line SDA (open-drain, internal pull-up). Mode 3: general-purpose GPIO.
13 RTS1/GPIO7 bidirectional At reset, sampled as MODE1 configuration strap (with pin 10) to select operating mode; internal pull-up, 5V tolerant. After reset: UART1 RTS MODEM output (active low), or GPIO7 in mode 0.
14 VCC power_in Positive supply input to internal 3.3 V regulator. 3.0-3.6 V (typ 3.3 V). Requires ~0.1 uF decoupling capacitor placed close to the pin. Typical ICC = 38 mA.
15 DCD0/GPIO4/ACT bidirectional Mode 0: UART0 DCD MODEM input (carrier detect, active low, 5V tolerant) or GPIO4. Mode 1/2/3: ACT output - USB configuration-complete status indicator, active low (drives a USB status LED). If ACT detects an external pull-down at power-up, DTR1 switches to TNOW1 function.
16 UD- bidirectional USB 2.0 high-speed D- data line. Connect directly to the USB bus; no series resistor permitted (would degrade signal quality). Internal 1.5 kΩ pull-up handled on-chip.
17 UD+ bidirectional USB 2.0 high-speed D+ data line. Connect directly to the USB bus; no series resistor permitted. Internal series termination and 1.5 kΩ pull-up handled on-chip.
18 GND power_in Common ground reference. Must be connected to the USB bus ground.
19 XI input Crystal oscillator input. Connect an 8 MHz (±0.4%) crystal between XI and XO with ~22 pF load capacitors to ground on each pin. Alternatively drive with an 8 MHz external clock.
20 XO output Crystal oscillator inverting output. Connect to the other side of the 8 MHz crystal with ~22 pF load capacitor to ground. Leave open if XI is driven by an external clock.

Key specifications

Parameter Value
Manufacturer WCH Jiangsu Qin Heng
Package TSSOP-20
Category Interface
Pins 20

Ordering variants

  • CH347T
  • CH347TCH347F

CAD (KiCad official)

  • Symbol: CH347T
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WCH Jiangsu Qin Heng datasheet (None pp, sha256 5f360d0a5e78f7b5, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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