CH343G from WCH Jiangsu Qin Heng, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Common ground reference; must connect to USB bus ground.
2	TXD	output	UART serial data output. Idle state is high.
3	RXD	input	UART serial data input with internal pull-up to VIO.
4	V3	power_in	Internal 3.3V LDO output; also core and USB PHY supply. Requires ~0.1uF decoupling. When VDD5<3.6V, tie V3 to VDD5 and feed external 3.3V; when VDD5>3.6V, use only a decoupling capacitor.
5	UD+	bidirectional	USB D+ data line, connects directly to USB bus. Do NOT add series resistor (internal PHY includes required pull-up).
6	UD-	bidirectional	USB D- data line, connects directly to USB bus. Do NOT add series resistor.
7	VBUS	input	USB VBUS presence detect input with internal pull-down (controllable via MCR OUT1). Loss of VBUS triggers USB suspend/sleep.
8	ACT#	output	USB configuration-complete status output, active low. High-Z (inactive) during USB suspend. Typically drives an activity LED via a current-limit resistor to VIO.
9	DCD	input	MODEM handshake input: Data Carrier Detect, active low.
10	DTR/TNOW	output	Default MODEM handshake output DTR (Data Terminal Ready, active low). If an external ~4.7kΩ pull-down is detected at power-up, the pin auto-switches to TNOW (transmit-in-progress status, active high) for RS-485 half-duplex driver enable.
11	RTS	output	MODEM handshake output: Request To Send, active low. Used by hardware auto flow control.
12	DSR	input	MODEM handshake input: Data Set Ready, active low.
13	CTS	input	MODEM handshake input: Clear To Send, active low. Used by hardware auto flow control.
14	RI	input	MODEM handshake input: Ring Indicator, active low.
15	VIO	power_in	I/O rail supply for UART and control pins. Accepts 1.8V-5V; should share supply with attached MCU/peripheral. Requires external decoupling capacitor. Does not back-feed VDD5/V3.
16	VDD5	power_in	Positive supply input to the internal 3.3V LDO. Accepts 5V (typical, from USB VBUS) or 3.3V (when tied to V3). Absolute max 6.0V. Requires external decoupling capacitor.

Key specifications

Parameter	Value
Manufacturer	WCH Jiangsu Qin Heng
Package	SOP-16
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

CH343G
CH343C
CH343P
CH343K

CAD (KiCad official)

Symbol: CH343G
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: WCH Jiangsu Qin Heng datasheet (8 pp, sha256 656a3a7bd49d78a4, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF