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Initial commit: component/cd74hc4067

Kyle Bergstedt ·9dedd6a853 ·4mo ago
2 files changed +180
README.mdadded+122
@@ -0,0 +1,122 @@+**Source:** [Texas Instruments CD74HC4067 / CD74HCT4067 Datasheet](https://www.ti.com/lit/ds/symlink/cd74hc4067.pdf)+**Manufacturer:** Texas Instruments+**Part Number:** CD74HC4067 (HCT variant: CD74HCT4067)+**Document:** SCHS209D — November 1998, Revised December 2024 (High-Speed CMOS Logic 16-Channel Analog Multiplexer and Demultiplexer)++## Description++The CD74HC4067 and CD74HCT4067 devices are digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.++These analog multiplexers and demultiplexers control analog voltages that may vary across the voltage supply range. They are bidirectional switches, thus allowing any analog input to be used as an output and vice versa. The switches have low on-resistance and low off leakages. In addition, these devices have an enable control that, when high, disables all switches to their off state.++## Key Specifications++| Parameter | Value |+| --- | --- |+| Channels | 16 (analog mux/demux, bidirectional) |+| Supply Voltage (HC) | 2 V to 6 V (analog input up to V<sub>CC</sub>) |+| Supply Voltage (HCT) | 4.5 V to 5.5 V |+| On-Resistance (typ) | 70 Ω @ V<sub>CC</sub> = 4.5 V; 60 Ω @ V<sub>CC</sub> = 6 V |+| CMOS input compatibility | I<sub>I</sub> ≤ 1 µA at V<sub>OL</sub>, V<sub>OH</sub> |+| LSTTL input drive loads | 15 |+| Direct LSTTL input logic compatibility | V<sub>IL</sub> ≤ 0.8 V (max), V<sub>IH</sub> ≥ 2 V (min) @ V<sub>CC</sub> = 4.5 V to 5.5 V |+| High noise immunity | N<sub>IL</sub> = 30 %, N<sub>IH</sub> = 30 % of V<sub>CC</sub> @ V<sub>CC</sub> = 5 V |+| Fanout (over-temperature range) | 10 LSTTL standard outputs; 15 LSTTL bus-driver outputs |+| Wide operating temperature range | −55 °C to +125 °C |+| Propagation delay / switching time | ~6 ns (typ) at 4.5 V, balanced |+| Packages | PDIP (E), SOIC (M), SSOP (SM), TSSOP (PW) — 24-pin |++## Features++- Wide analog input voltage range+- Low ON resistance: V<sub>CC</sub> = 4.5 V → 70 Ω (typ); V<sub>CC</sub> = 6 V → 60 Ω (typ)+- Fast switching propagation speeds+- Break-before-make switching (6 ns typ at 4.5 V)+- Available in both narrow- and wide-body plastic packages+- Fanout (over-temperature range): 10 LSTTL (std) / 15 LSTTL (bus-drive)+- Wide operating temperature range: −55 °C to 125 °C+- Balanced propagation delay and transition times+- Significant power reduction compared to LSTTL logic ICs+- HC types: 2 V to 6 V operation; high noise immunity 30 % of V<sub>CC</sub>+- HCT types: 4.5 V to 5.5 V operation; direct LSTTL-input logic compatibility and CMOS input compatibility++## Applications++- Signal gating+- Modulators+- Squelch controls+- Demodulators+- Choppers+- Commutating switches+- Analog-to-digital and digital-to-analog conversions+- Digital control of frequency, impedance, phase, and analog-signal gain+- Energy infrastructure+- Building automation+- Wireless infrastructure+- Appliances+- Data center & enterprise computing+- Retail automation & payment++## Pin Configuration++24-pin PDIP (N, DW, DB), SOIC, or SSOP top view.++| Pin | Name | Type | Description |+| --- | --- | --- | --- |+| 1 | COMMON INPUT/OUTPUT | IO | Common input or output |+| 2 | I7 | IO | Switch input/output |+| 3 | I6 | IO | Switch input/output |+| 4 | I5 | IO | Switch input/output |+| 5 | I4 | IO | Switch input/output |+| 6 | I3 | IO | Switch input/output |+| 7 | I2 | IO | Switch input/output |+| 8 | I1 | IO | Switch input/output |+| 9 | I0 | IO | Switch input/output |+| 10 | S0 | I | Select / Address pin |+| 11 | S1 | I | Select / Address pin |+| 12 | GND | P | Ground pin |+| 13 | S2 | I | Select / Address pin |+| 14 | S3 | I | Select / Address pin |+| 15 | E | I | Enable for all switches ON/OFF (active low) |+| 16 | I15 | IO | Switch input/output |+| 17 | I14 | IO | Switch input/output |+| 18 | I13 | IO | Switch input/output |+| 19 | I12 | IO | Switch input/output |+| 20 | I11 | IO | Switch input/output |+| 21 | I10 | IO | Switch input/output |+| 22 | I9 | IO | Switch input/output |+| 23 | I8 | IO | Switch input/output |+| 24 | V<sub>CC</sub> | P | Power pin |++## Thermal Information++| Thermal Metric | E (PDIP, 24 pins) | M (SOIC, 24 pins) | SM (SSOP, 24 pins) | PW (TSSOP, 24 pins) | Unit |+| --- | --- | --- | --- | --- | --- |+| R<sub>θJA</sub> | 67 | 84.8 | 96.2 | 97.4 | °C/W |+| R<sub>θJC(top)</sub> | N/A | 57.0 | 60.0 | 45.0 | °C/W |+| R<sub>θJB</sub> | N/A | 59.5 | 65.1 | 62.7 | °C/W |+| Ψ<sub>JT</sub> | N/A | 29.0 | 21.1 | 5.20 | °C/W |+| Ψ<sub>JB</sub> | N/A | 59.0 | 64.4 | 62.1 | °C/W |++## Recommended Operating Conditions++| Parameter | Symbol | Conditions | Min | Nom | Max | Unit |+| --- | --- | --- | --- | --- | --- | --- |+| Supply Voltage Range | V<sub>CC</sub> | CD54 and 74HC types | 2 | — | 6 | V |+| Supply Voltage Range | V<sub>CC</sub> | CD54 and 74HCT types | 4.5 | — | 5.5 | V |+| Analog Switch I/O Voltage | V<sub>IS</sub> | | 0 | — | V<sub>CC</sub> | V |+| Ambient Temperature | T<sub>A</sub> | | −55 | — | 125 | °C |+| Input Rise and Fall Times | t<sub>r</sub>, t<sub>f</sub> | 2 V | 0 | — | 1000 | ns |+| Input Rise and Fall Times | t<sub>r</sub>, t<sub>f</sub> | 4.5 V | 0 | — | 500 | ns |+| Input Rise and Fall Times | t<sub>r</sub>, t<sub>f</sub> | 6 V | 0 | — | 400 | ns |++## Package Information++| Part Number | Package | Body Size (NOM) |+| --- | --- | --- |+| CD74HC4067M | SOIC (24) | 15.4 mm × 10.3 mm |+| CD74HC4067M96 | SOIC (24) | 15.4 mm × 10.3 mm |+| CD74HC4067PW | TSSOP (24) | 7.8 mm × 6.4 mm |+| CD74HCT4067M | SOIC (24) | 15.4 mm × 10.3 mm |+| CD74HCT4067M96 | SOIC (24) | 8.20 mm × 7.40 mm |+| CD74HCT4067PW | TSSOP (24) | 7.8 mm × 6.4 mm |
page.jsonadded+58
@@ -0,0 +1,58 @@+{+  "schema_version": 1,+  "type": "component",+  "slug": "cd74hc4067",+  "title": "CD74HC4067 — 16-Channel Analog Multiplexer / Demultiplexer",+  "brief": "TI CD74HC4067. 16-channel bidirectional analog mux/demux, 70 Ω typ R(on), break-before-make, 2–6 V HC or 4.5–5.5 V HCT. 24-pin PDIP/SOIC/SSOP/TSSOP.",+  "version": "1.0.0",+  "tags": [],+  "license": "MIT",+  "sample_prompts": [+    {+      "prompt": "Show me the CD74HC4067 datasheet",+      "label": "View datasheet"+    },+    {+      "prompt": "Pinout for CD74HC4067",+      "label": "Pinout"+    },+    {+      "prompt": "On-resistance of the CD74HC4067",+      "label": "Ron"+    },+    {+      "prompt": "Difference between CD74HC4067 and CD74HCT4067",+      "label": "HC vs HCT"+    },+    {+      "prompt": "CD74HC4067 supply voltage range",+      "label": "Supply"+    }+  ],+  "component": {+    "mpn": "CD74HC4067 — 16-Channel Analog Multiplexer / Demultiplexer",+    "manufacturer": "Texas Instruments",+    "package": "",+    "pin_count": null,+    "category": "Analog Multiplexer",+    "subcategory": "",+    "body_size": null,+    "parts": {},+    "distributor_links": {}+  },+  "readme": "**Source:** [Texas Instruments CD74HC4067 / CD74HCT4067 Datasheet](https://www.ti.com/lit/ds/symlink/cd74hc4067.pdf)\n**Manufacturer:** Texas Instruments\n**Part Number:** CD74HC4067 (HCT variant: CD74HCT4067)\n**Document:** SCHS209D — November 1998, Revised December 2024 (High-Speed CMOS Logic 16-Channel Analog Multiplexer and Demultiplexer)\n\n## Description\n\nThe CD74HC4067 and CD74HCT4067 devices are digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.\n\nThese analog multiplexers and demultiplexers control analog voltages that may vary across the voltage supply range. They are bidirectional switches, thus allowing any analog input to be used as an output and vice versa. The switches have low on-resistance and low off leakages. In addition, these devices have an enable control that, when high, disables all switches to their off state.\n\n## Key Specifications\n\n| Parameter | Value |\n| --- | --- |\n| Channels | 16 (analog mux/demux, bidirectional) |\n| Supply Voltage (HC) | 2 V to 6 V (analog input up to V<sub>CC</sub>) |\n| Supply Voltage (HCT) | 4.5 V to 5.5 V |\n| On-Resistance (typ) | 70 Ω @ V<sub>CC</sub> = 4.5 V; 60 Ω @ V<sub>CC</sub> = 6 V |\n| CMOS input compatibility | I<sub>I</sub> ≤ 1 µA at V<sub>OL</sub>, V<sub>OH</sub> |\n| LSTTL input drive loads | 15 |\n| Direct LSTTL input logic compatibility | V<sub>IL</sub> ≤ 0.8 V (max), V<sub>IH</sub> ≥ 2 V (min) @ V<sub>CC</sub> = 4.5 V to 5.5 V |\n| High noise immunity | N<sub>IL</sub> = 30 %, N<sub>IH</sub> = 30 % of V<sub>CC</sub> @ V<sub>CC</sub> = 5 V |\n| Fanout (over-temperature range) | 10 LSTTL standard outputs; 15 LSTTL bus-driver outputs |\n| Wide operating temperature range | −55 °C to +125 °C |\n| Propagation delay / switching time | ~6 ns (typ) at 4.5 V, balanced |\n| Packages | PDIP (E), SOIC (M), SSOP (SM), TSSOP (PW) — 24-pin |\n\n## Features\n\n- Wide analog input voltage range\n- Low ON resistance: V<sub>CC</sub> = 4.5 V → 70 Ω (typ); V<sub>CC</sub> = 6 V → 60 Ω (typ)\n- Fast switching propagation speeds\n- Break-before-make switching (6 ns typ at 4.5 V)\n- Available in both narrow- and wide-body plastic packages\n- Fanout (over-temperature range): 10 LSTTL (std) / 15 LSTTL (bus-drive)\n- Wide operating temperature range: −55 °C to 125 °C\n- Balanced propagation delay and transition times\n- Significant power reduction compared to LSTTL logic ICs\n- HC types: 2 V to 6 V operation; high noise immunity 30 % of V<sub>CC</sub>\n- HCT types: 4.5 V to 5.5 V operation; direct LSTTL-input logic compatibility and CMOS input compatibility\n\n## Applications\n\n- Signal gating\n- Modulators\n- Squelch controls\n- Demodulators\n- Choppers\n- Commutating switches\n- Analog-to-digital and digital-to-analog conversions\n- Digital control of frequency, impedance, phase, and analog-signal gain\n- Energy infrastructure\n- Building automation\n- Wireless infrastructure\n- Appliances\n- Data center & enterprise computing\n- Retail automation & payment\n\n## Pin Configuration\n\n24-pin PDIP (N, DW, DB), SOIC, or SSOP top view.\n\n| Pin | Name | Type | Description |\n| --- | --- | --- | --- |\n| 1 | COMMON INPUT/OUTPUT | IO | Common input or output |\n| 2 | I7 | IO | Switch input/output |\n| 3 | I6 | IO | Switch input/output |\n| 4 | I5 | IO | Switch input/output |\n| 5 | I4 | IO | Switch input/output |\n| 6 | I3 | IO | Switch input/output |\n| 7 | I2 | IO | Switch input/output |\n| 8 | I1 | IO | Switch input/output |\n| 9 | I0 | IO | Switch input/output |\n| 10 | S0 | I | Select / Address pin |\n| 11 | S1 | I | Select / Address pin |\n| 12 | GND | P | Ground pin |\n| 13 | S2 | I | Select / Address pin |\n| 14 | S3 | I | Select / Address pin |\n| 15 | E | I | Enable for all switches ON/OFF (active low) |\n| 16 | I15 | IO | Switch input/output |\n| 17 | I14 | IO | Switch input/output |\n| 18 | I13 | IO | Switch input/output |\n| 19 | I12 | IO | Switch input/output |\n| 20 | I11 | IO | Switch input/output |\n| 21 | I10 | IO | Switch input/output |\n| 22 | I9 | IO | Switch input/output |\n| 23 | I8 | IO | Switch input/output |\n| 24 | V<sub>CC</sub> | P | Power pin |\n\n## Thermal Information\n\n| Thermal Metric | E (PDIP, 24 pins) | M (SOIC, 24 pins) | SM (SSOP, 24 pins) | PW (TSSOP, 24 pins) | Unit |\n| --- | --- | --- | --- | --- | --- |\n| R<sub>θJA</sub> | 67 | 84.8 | 96.2 | 97.4 | °C/W |\n| R<sub>θJC(top)</sub> | N/A | 57.0 | 60.0 | 45.0 | °C/W |\n| R<sub>θJB</sub> | N/A | 59.5 | 65.1 | 62.7 | °C/W |\n| Ψ<sub>JT</sub> | N/A | 29.0 | 21.1 | 5.20 | °C/W |\n| Ψ<sub>JB</sub> | N/A | 59.0 | 64.4 | 62.1 | °C/W |\n\n## Recommended Operating Conditions\n\n| Parameter | Symbol | Conditions | Min | Nom | Max | Unit |\n| --- | --- | --- | --- | --- | --- | --- |\n| Supply Voltage Range | V<sub>CC</sub> | CD54 and 74HC types | 2 | — | 6 | V |\n| Supply Voltage Range | V<sub>CC</sub> | CD54 and 74HCT types | 4.5 | — | 5.5 | V |\n| Analog Switch I/O Voltage | V<sub>IS</sub> | | 0 | — | V<sub>CC</sub> | V |\n| Ambient Temperature | T<sub>A</sub> | | −55 | — | 125 | °C |\n| Input Rise and Fall Times | t<sub>r</sub>, t<sub>f</sub> | 2 V | 0 | — | 1000 | ns |\n| Input Rise and Fall Times | t<sub>r</sub>, t<sub>f</sub> | 4.5 V | 0 | — | 500 | ns |\n| Input Rise and Fall Times | t<sub>r</sub>, t<sub>f</sub> | 6 V | 0 | — | 400 | ns |\n\n## Package Information\n\n| Part Number | Package | Body Size (NOM) |\n| --- | --- | --- |\n| CD74HC4067M | SOIC (24) | 15.4 mm × 10.3 mm |\n| CD74HC4067M96 | SOIC (24) | 15.4 mm × 10.3 mm |\n| CD74HC4067PW | TSSOP (24) | 7.8 mm × 6.4 mm |\n| CD74HCT4067M | SOIC (24) | 15.4 mm × 10.3 mm |\n| CD74HCT4067M96 | SOIC (24) | 8.20 mm × 7.40 mm |\n| CD74HCT4067PW | TSSOP (24) | 7.8 mm × 6.4 mm |\n",+  "author": {+    "id": "695820315b5f1e4db2fcf602",+    "name": "Kyle Bergstedt",+    "email": "[email protected]"+  },+  "visibility": {+    "public": true+  },+  "hero": null,+  "discovery_triggers": [],+  "discovery_pitch": null,+  "metadata": {},+  "created_at": "2026-05-28T05:36:48.590Z",+  "updated_at": "2026-05-28T05:36:48.590Z"+}\ No newline at end of file