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Pinout
Key specifications
Ordering variants
CAD (KiCad official)
Provenance

README

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CD74HC123PWR

Texas Instruments · Monostable Multivibrators · TSSOP-16

CD74HC123PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Monostable 1 trigger input A. Schmitt-trigger input; a HIGH-to-LOW (falling-edge) transition on 1A while 1B is HIGH and 1R is HIGH initiates the MONO 1 output pulse. VIH/VIL per HC-type DC specs (VIH ≥ 0.7·VCC, VIL ≤ 0.3·VCC at VCC = 4.5 V).
2	1B	input	Monostable 1 trigger input B. Schmitt-trigger input; a LOW-to-HIGH (rising-edge) transition on 1B while 1A is LOW and 1R is HIGH initiates the MONO 1 output pulse.
3	1R	input	Monostable 1 Reset (active LOW). Driving 1R LOW asynchronously terminates the MONO 1 output pulse and forces 1Q LOW / 1Q̄ HIGH; on the 'HC123, a LOW-to-HIGH transition on 1R with 1A LOW and 1B HIGH can also trigger the mono.
4	1Q̄	output	Monostable 1 complementary (inverting) output. Idles HIGH; pulses LOW for the programmed pulse width tW ≈ 0.45·Rx·Cx following a valid trigger. Drives up to 15 LSTTL loads (bus-driver output).
5	2Q	output	Monostable 2 non-inverting output. Idles LOW; pulses HIGH for the programmed pulse width tW ≈ 0.45·Rx·Cx following a valid trigger on MONO 2.
6	2Cx	passive	External timing-capacitor connection for MONO 2. Connect the timing capacitor Cx between 2Cx (pin 6) and 2Rx/Cx (pin 7); the polarised terminal (if electrolytic) goes on 2Rx/Cx. Cx,min ≈ 0 pF.
7	2Rx/Cx	passive	External timing-resistor / capacitor junction for MONO 2. Connect Cx between pin 6 and this pin, and Rx between this pin and VCC. Rx,min ≈ 5 kΩ; pulse width tW ≈ 0.45·Rx·Cx at VCC = 5 V.
8	GND	power_in	Ground / 0 V reference for the device.
9	2R	input	Monostable 2 Reset (active LOW). Driving 2R LOW asynchronously terminates the MONO 2 output pulse; on the 'HC123, a LOW-to-HIGH transition on 2R can also trigger the mono.
10	2B	input	Monostable 2 trigger input B. Schmitt-trigger input; a LOW-to-HIGH transition on 2B while 2A is LOW and 2R is HIGH initiates the MONO 2 output pulse.
11	2A	input	Monostable 2 trigger input A. Schmitt-trigger input; a HIGH-to-LOW transition on 2A while 2B is HIGH and 2R is HIGH initiates the MONO 2 output pulse.
12	2Q̄	output	Monostable 2 complementary (inverting) output. Idles HIGH; pulses LOW for tW ≈ 0.45·Rx·Cx following a valid trigger. Drives up to 15 LSTTL loads.
13	1Q	output	Monostable 1 non-inverting output. Idles LOW; pulses HIGH for the programmed pulse width tW ≈ 0.45·Rx·Cx following a valid trigger on MONO 1.
14	1Cx	passive	External timing-capacitor connection for MONO 1. Connect Cx between 1Cx (pin 14) and 1Rx/Cx (pin 15). Cx,min ≈ 0 pF.
15	1Rx/Cx	passive	External timing-resistor / capacitor junction for MONO 1. Cx between pin 14 and this pin, Rx between this pin and VCC. Rx,min ≈ 5 kΩ.
16	VCC	power_in	Positive supply. 2 V to 6 V for 'HC types (this device); typical 5 V. Bypass with a local 100 nF ceramic to GND.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Logic
Pins	16

Ordering variants

CD74HC123PWR
CD74HC123PWRPWT
CD74HC123PWRE
CD74HC123PWRM
CD74HC123PWRMT
CD74HC123PWRM96
CD74HC123PWRNSR
CD74HC123PWRF3A

CAD (KiCad official)

Symbol: CD74HC123PWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (None pp, sha256 1ae45a9eac40347d, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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