component
CD4073BM96
Public Unreviewedby Ray
Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownCD4073BM96
Texas Instruments · Gates · SOIC-14
CD4073BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A. CMOS logic input, VIH >= 3.5 V (at VDD=5 V), input current <= +/-0.1 uA typ. Protected by CMOS input-protection network. |
| 2 | 1B | input | Gate 1 input B. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network. |
| 3 | 2A | input | Gate 2 input A. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network. |
| 4 | 2B | input | Gate 2 input B. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network. |
| 5 | 2C | input | Gate 2 input C. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network. |
| 6 | 2Y | output | Gate 2 output. Rail-to-rail CMOS output; IOL >= 0.51 mA and IOH >= 0.51 mA at VDD=5 V. Output is high only when 2A, 2B and 2C are all high. |
| 7 | VSS | power_in | Negative supply / ground reference (0 V). All input and output voltages referenced to VSS. |
| 8 | 3Y | output | Gate 3 output. Rail-to-rail CMOS output; IOL >= 0.51 mA and IOH >= 0.51 mA at VDD=5 V. Output is high only when 3A, 3B and 3C are all high. |
| 9 | 3A | input | Gate 3 input A. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network. |
| 10 | 3B | input | Gate 3 input B. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network. |
| 11 | 3C | input | Gate 3 input C. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network. |
| 12 | 1Y | output | Gate 1 output. Rail-to-rail CMOS output; IOL >= 0.51 mA and IOH >= 0.51 mA at VDD=5 V. Output is high only when 1A, 1B and 1C are all high. |
| 13 | 1C | input | Gate 1 input C. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network. |
| 14 | VDD | power_in | Positive supply. Recommended 3 V to 18 V; absolute maximum -0.5 V to +20 V. Bypass locally with a decoupling capacitor to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
CD4073BM96CD4073BM96E4CD4073BM96G4CD4073BM96BME4CD4073BM96BMG4CD4073BM96BMTCD4073BM96BMTE4CD4073BM96BMTG4CD4073BM96BECD4073BM96BEE4CD4073BM96BFCD4073BM96BF3ACD4073BM96BNSRCD4073BM96BNSRE4CD4073BM96BNSRG4CD4073BM96BPWCD4073BM96BPWE4CD4073BM96BPWG4CD4073BM96BPWRCD4073BM96BPWRE4CD4073BM96BPWRG4
CAD (KiCad official)
- Symbol:
CD4073BM96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
998cae23bbe77ddf, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).