CD4070BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	A	input	Input A of gate 1 (J = A XOR B). CMOS input protected by the on-chip CMOS protection network. VIH >= 3.5V @ VDD=5V; VIL <= 1.5V @ VDD=5V; IIN typ 1e-5 uA, max 0.1 uA at 18V/25C.
2	B	input	Input B of gate 1 (J = A XOR B). CMOS input protected by the on-chip CMOS protection network.
3	J	output	Output of gate 1 (J = A XOR B). CMOS push-pull output, symmetric drive. VOH >= 4.95V and VOL <= 0.05V at VDD=5V. IOL/IOH ~ 0.51 mA min @ VDD=5V.
4	K	output	Output of gate 2 (K = C XOR D). CMOS push-pull output, symmetric drive characteristics.
5	C	input	Input C of gate 2 (K = C XOR D). CMOS input protected by the on-chip CMOS protection network.
6	D	input	Input D of gate 2 (K = C XOR D). CMOS input protected by the on-chip CMOS protection network.
7	VSS	power_in	Negative supply / ground reference. Typically tied to 0V. Supply voltage range VDD-VSS = 3V to 18V (absolute max 20V).
8	E	input	Input E of gate 3 (L = E XOR F). CMOS input protected by the on-chip CMOS protection network.
9	F	input	Input F of gate 3 (L = E XOR F). CMOS input protected by the on-chip CMOS protection network.
10	L	output	Output of gate 3 (L = E XOR F). CMOS push-pull output, symmetric drive characteristics.
11	M	output	Output of gate 4 (M = G XOR H). CMOS push-pull output, symmetric drive characteristics.
12	G	input	Input G of gate 4 (M = G XOR H). CMOS input protected by the on-chip CMOS protection network.
13	H	input	Input H of gate 4 (M = G XOR H). CMOS input protected by the on-chip CMOS protection network.
14	VDD	power_in	Positive supply voltage. Operating range 3V to 18V; absolute maximum 20V (referenced to VSS). Quiescent IDD typ 0.01 uA at VDD=5-15V; 0.02 uA typ at VDD=20V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-14
Category	Logic
Pins	14

Ordering variants

Same part, different packaging or reel option.

CD4070BM96
CD4070BM96E4
CD4070BM96G4
CD4070BM96BME4
CD4070BM96BMG4
CD4070BM96BMT
CD4070BM96BMTE4
CD4070BM96BMTG4
CD4070BM96BE
CD4070BM96BEE4
CD4070BM96BF
CD4070BM96BF3A
CD4070BM96BF3AS2534
CD4070BM96BNSR
CD4070BM96BNSRE4
CD4070BM96BNSRG4
CD4070BM96BPW
CD4070BM96BPWE4
CD4070BM96BPWG4
CD4070BM96BPWR
CD4070BM96BPWRE4
CD4070BM96BPWRG4

CAD (KiCad official)

Symbol: CD4070BM96
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`cd4070bm96.step`	195 KB	You want the bare part, or you mark your own boards.
`cd4070bm96-etched.step`	2.6 MB	You want the part with `CD4070BM96` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 631 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (30 pp, sha256 844d150c497df9f2, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF