CD4069BDTR from XBLW, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Inverter 1 data input (CMOS logic input, VIL/VIH scale with VDD).
2	1Y	output	Inverter 1 data output (inverted 1A). Symmetrical CMOS push-pull output.
3	2A	input	Inverter 2 data input.
4	2Y	output	Inverter 2 data output (inverted 2A).
5	3A	input	Inverter 3 data input.
6	3Y	output	Inverter 3 data output (inverted 3A).
7	VSS	power_in	Negative supply / ground reference (0 V). All voltages referenced to VSS.
8	4Y	output	Inverter 4 data output (inverted 4A).
9	4A	input	Inverter 4 data input.
10	5Y	output	Inverter 5 data output (inverted 5A).
11	5A	input	Inverter 5 data input.
12	6Y	output	Inverter 6 data output (inverted 6A).
13	6A	input	Inverter 6 data input. Unused inputs must be tied to VDD, VSS, or another driven input.
14	VDD	power_in	Positive supply voltage, recommended 3 V to 15 V (absolute max +18 V) referenced to VSS.

Key specifications

Parameter	Value
Manufacturer	XBLW
Package	SOP-14
Category	Logic
Pins	14

Ordering variants

Same part, different packaging or reel option.

CD4069BDTR
CD4069BDTRBE
CD4069BDTRBTDTR

CAD (KiCad official)

Symbol: CD4069BDTR
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOP-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XBLW datasheet (13 pp, sha256 c72f53ae76bcf6b6, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF