CD4011BPWR
Public Unreviewedby Ray
Texas Instruments Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownCD4011BPWR
Texas Instruments · Gates · TSSOP-14
CD4011BPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A. CMOS logic input, VIH = 3.5 V min at VDD = 5 V. Protected by internal CMOS clamp network to VDD and VSS. |
| 2 | 1B | input | Gate 1 input B. CMOS logic input, VIH = 3.5 V min at VDD = 5 V. Protected by internal CMOS clamp network to VDD and VSS. |
| 3 | 1Y | output | Gate 1 output, Y = NAND(1A, 1B). Buffered CMOS output; IOL/IOH typ 1 mA at VDD = 5 V. |
| 4 | 2Y | output | Gate 2 output, Y = NAND(2A, 2B). Buffered CMOS output; IOL/IOH typ 1 mA at VDD = 5 V. |
| 5 | 2A | input | Gate 2 input A. CMOS logic input, VIH = 3.5 V min at VDD = 5 V. |
| 6 | 2B | input | Gate 2 input B. CMOS logic input, VIH = 3.5 V min at VDD = 5 V. |
| 7 | VSS | power_in | Negative supply / ground reference. Normally tied to 0 V. All input and output voltages are referenced to this pin. |
| 8 | 3A | input | Gate 3 input A. CMOS logic input, VIH = 3.5 V min at VDD = 5 V. |
| 9 | 3B | input | Gate 3 input B. CMOS logic input, VIH = 3.5 V min at VDD = 5 V. |
| 10 | 3Y | output | Gate 3 output, Y = NAND(3A, 3B). Buffered CMOS output; IOL/IOH typ 1 mA at VDD = 5 V. |
| 11 | 4Y | output | Gate 4 output, Y = NAND(4A, 4B). Buffered CMOS output; IOL/IOH typ 1 mA at VDD = 5 V. |
| 12 | 4A | input | Gate 4 input A. CMOS logic input, VIH = 3.5 V min at VDD = 5 V. |
| 13 | 4B | input | Gate 4 input B. CMOS logic input, VIH = 3.5 V min at VDD = 5 V. |
| 14 | VDD | power_in | Positive supply. Recommended operating range 3 V to 18 V (absolute maximum -0.5 V to +20 V referenced to VSS). Bypass to VSS with a local decoupling capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
CD4011BPWRCD4011BPWRG4CD4011BPWRECD4011BPWREE4CD4011BPWRFCD4011BPWRF3ACD4011BPWRMCD4011BPWRM96CD4011BPWRME4CD4011BPWRM96E4CD4011BPWRMTCD4011BPWRNSR
CAD (KiCad official)
- Symbol:
CD4011BPWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
cd4011bpwr.step |
194 KB | You want the bare part, or you mark your own boards. |
cd4011bpwr-etched.step |
2.3 MB | You want the part with CD4011BPWR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 587 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
92d82fa35555e4e4, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).