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Contents

README

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CAT25512VI-GT3

onsemi · EEPROM · SOIC-8

CAT25512VI-GT3 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Active-low chip select. Every SPI transaction must begin with a HIGH-to-LOW transition on CS and end with a LOW-to-HIGH transition. When CS is HIGH the device is in Standby Mode and SO is tri-stated.
2 SO output Serial data output. Data is shifted out on the falling edge of SCK in SPI modes (0,0) and (1,1). Output is high-impedance when CS is HIGH or HOLD is asserted low.
3 WP input Active-low write protect. When WP is held low and the WPEN bit in the Status Register is 1, writing to the Status Register is disabled (hardware write protection).
4 VSS power_in Ground reference for supply and I/O.
5 SI input Serial data input. Accepts op-codes, addresses, and write data. Data is latched on the rising edge of SCK in SPI modes (0,0) and (1,1).
6 SCK input Serial clock input, provided by the SPI host to synchronize communication. Supports DC to 20 MHz depending on VCC.
7 HOLD input Active-low hold input used to pause an SPI transmission without dropping CS. Taking HOLD low freezes the interface; taking it high resumes with SCK low during both transitions. Tie to VCC (directly or via a pull-up) when not used.
8 VCC power_in Positive supply, 1.8 V to 5.5 V. Read supply current up to 3 mA at 20 MHz; write supply current up to 2 mA. Standby current typically <5 uA.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Memory
Pins 8

Ordering variants

  • CAT25512VI-GT3
  • CAT25512VI-GT3XI
  • CAT25512VI-GT3LI
  • CAT25512VI-GT3YI
  • CAT25512VI-GT3HU5
  • CAT25512VI-GT3C8A

CAD (KiCad official)

  • Symbol: CAT25512VI-GT3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cat25512vi-gt3.step 122 KB You want the bare part, or you mark your own boards.
cat25512vi-gt3-etched.step 2.4 MB You want the part with CAT25512VI-GT3 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 606 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (17 pp, sha256 ff68b0f40b13b7de, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF