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Contents

README

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CAHCT126QPWRG4Q1

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-14

CAHCT126QPWRG4Q1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output-enable input for buffer 1. When 1OE is high, the buffer passes 1A to 1Y; when low, 1Y is placed in the high-impedance (Hi-Z) state. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V.
2 1A input Data input to buffer 1. Driven through the 3-state buffer to output 1Y when 1OE is high. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V, VI range 0-5.5 V.
3 1Y tri_state 3-state output of buffer 1. Drives the buffered value of 1A when 1OE is high; Hi-Z when 1OE is low. Guaranteed drive is ±8 mA at VCC = 5 V (VOH ≥ 3.94 V, VOL ≤ 0.36 V).
4 2OE input Output-enable input for buffer 2. When 2OE is high, the buffer passes 2A to 2Y; when low, 2Y is Hi-Z. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V.
5 2A input Data input to buffer 2. Driven through the 3-state buffer to output 2Y when 2OE is high. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V, VI range 0-5.5 V.
6 2Y tri_state 3-state output of buffer 2. Drives the buffered value of 2A when 2OE is high; Hi-Z when 2OE is low. Guaranteed drive is ±8 mA at VCC = 5 V.
7 GND power_in Ground reference for the device. Connect to the system ground plane; a local decoupling capacitor from VCC to GND is recommended.
8 3Y tri_state 3-state output of buffer 3. Drives the buffered value of 3A when 3OE is high; Hi-Z when 3OE is low. Guaranteed drive is ±8 mA at VCC = 5 V.
9 3A input Data input to buffer 3. Driven through the 3-state buffer to output 3Y when 3OE is high. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V, VI range 0-5.5 V.
10 3OE input Output-enable input for buffer 3. When 3OE is high, the buffer passes 3A to 3Y; when low, 3Y is Hi-Z. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V.
11 4Y tri_state 3-state output of buffer 4. Drives the buffered value of 4A when 4OE is high; Hi-Z when 4OE is low. Guaranteed drive is ±8 mA at VCC = 5 V.
12 4A input Data input to buffer 4. Driven through the 3-state buffer to output 4Y when 4OE is high. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V, VI range 0-5.5 V.
13 4OE input Output-enable input for buffer 4. When 4OE is high, the buffer passes 4A to 4Y; when low, 4Y is Hi-Z. TTL-compatible input; VIH ≥ 2 V, VIL ≤ 0.8 V.
14 VCC power_in Positive supply input. Operating range 4.5 V to 5.5 V; absolute maximum 7 V. Decouple to GND with a local ceramic capacitor (e.g. 100 nF) near the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • CAHCT126QPWRG4Q1
  • CAHCT126QPWRG4Q1D
  • CAHCT126QPWRG4Q1DR
  • CAHCT126QPWRG4Q1BQA

CAD (KiCad official)

  • Symbol: CAHCT126QPWRG4Q1
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 7161780ff9b93586, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF