Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

BST52

Nexperia · Darlington Transistors · SOT-89-3

BST52 from Nexperia, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 E passive Emitter of the NPN Darlington pair. Common return path for collector current; VEBO limited to 5 V (open collector).
2 C passive Collector of the NPN Darlington pair. Main current-handling terminal; VCEO up to 80 V, IC up to 1 A (peak 2 A). Also connected to the SOT89 heat-spreading tab for improved thermal dissipation.
3 B passive Base control input of the NPN Darlington pair. Drives the compound transistor through an integrated base-emitter resistor with an anti-parallel diode; IB limited to 100 mA.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-89-3
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: BST52
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (8 pp, sha256 8ca616767aa12634, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF