component
BR25G256FJ-3GE2
Public Unreviewedby Ray
ROHM EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownBR25G256FJ-3GE2
ROHM · EEPROM · SOIC-8
BR25G256FJ-3GE2 from ROHM, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CSB | input | Active-low chip select input. Drive low to select the device and frame an SPI transaction; drive high to deselect and place SO in high impedance. Referenced to Vcc; VIH >= 0.7Vcc (>=0.8Vcc below 1.7V). |
| 2 | SO | output | Serial data output (MISO). Data is shifted out MSB first on the falling edge of SCK. High-impedance when CSB is high or HOLDB is asserted. Drive strength: VOH >= Vcc-0.2 V at IOH = -2 mA (2.5-5.5 V). |
| 3 | WPB | input | Active-low hardware write-protect input. When low, the WRSR (Write Status Register) command is inhibited, locking the block-protection bits BP0/BP1 and preventing changes to write protection. |
| 4 | GND | power_in | Ground reference (0 V) for all inputs, outputs, and internal circuitry. |
| 5 | SI | input | Serial data input (MOSI). Op-code, address, and write data are shifted in MSB first on the rising edge of SCK. Setup time tDIS = 5 ns min at Vcc >= 4.5 V. |
| 6 | SCK | input | Serial clock input. Supports SPI modes (CPOL,CPHA) = (0,0) and (1,1) up to 20 MHz max at Vcc >= 4.5 V (5 MHz max at 1.7-2.5 V, 3 MHz max at 1.6-1.7 V). |
| 7 | HOLDB | input | Active-low hold input. Pulling HOLDB low while CSB is low pauses the current SPI transaction and forces SO to high impedance; the transaction resumes when HOLDB returns high. Allows the master to service higher-priority devices on a shared bus. |
| 8 | Vcc | power_in | Positive supply, 1.6 V to 5.5 V. Recommended bypass capacitor 0.1 uF to GND. Typical read current 0.1 uA standby, 2.0 mA read, 0.6 mA write at 5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
BR25G256FJ-3GE2BR25G256F-3GE2BR25G256FVT-3GE2BR25G256-3
CAD (KiCad official)
- Symbol:
BR25G256FJ-3GE2 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
br25g256fj-3ge2.step |
122 KB | You want the bare part, or you mark your own boards. |
br25g256fj-3ge2-etched.step |
3.2 MB | You want the part with BR25G256FJ-3GE2 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 766 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ROHM datasheet (37 pp, sha256
6e0b88fc30c2ef44, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).