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BQ7790509PWR

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by Ray

Texas Instruments Battery Management, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentpower management (pmic)bq7790509pwr
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Contents

README

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BQ7790509PWR

Texas Instruments · Battery Management · TSSOP-20

BQ7790509PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Supply voltage input. Powers the device from the top of the cell stack it monitors. Absolute max per-cell input rating is 36 V.
2 AVDD power_out Analog supply regulator output. Connect only to a decoupling capacitor; do not load externally.
3 VC5 input Cell 5 voltage sense input. On the 4-cell BQ77904 variant this pin must be tied to pin 4 (VC4); on the BQ77905 it connects to the top of cell 5.
4 VC4 input Cell 4 voltage sense input. Connects to the top of cell 4 through a series input resistor.
5 VC3 input Cell 3 voltage sense input. Connects to the top of cell 3 through a series input resistor.
6 VC2 input Cell 2 voltage sense input. Connects to the top of cell 2 through a series input resistor.
7 VC1 input Cell 1 voltage sense input. Connects to the top of cell 1 through a series input resistor.
8 AVSS power_in Analog ground reference for the internal analog circuitry.
9 SRP input Current sense positive input. Connect to the battery side of the external sense resistor. Used to measure charge/discharge overcurrent and short-circuit conditions (thresholds in the -85 mV to +340 mV range depending on fault type).
10 SRN input Current sense negative input. Connect to the PACK- side of the external sense resistor. Reference for the current-sense comparators.
11 DSG output Discharge FET gate driver output. Drives the gate of the external low-side NMOS discharge FET.
12 CHGU output CHG FET signal for stacked configurations. Used on the upper device of a stack to feed its CHG signal to the CTRC pin of the device below.
13 CHG output Charge FET gate driver output. Used on a single device or on the bottom device of a stack to drive the external low-side NMOS charge FET.
14 LD input PACK- load removal detection input. Senses the PACK- node to determine when the load has been removed for fault recovery.
15 TS input Thermistor temperature-sense input. Connect a 103AT NTC thermistor between TS and VSS; connect a 10-kΩ bias resistor from VTB to TS. Tie a 10-kΩ resistor from TS to AVSS if temperature protection is not used.
16 VTB output Thermistor bias output. Provides the bias voltage for the external thermistor divider on the TS pin.
17 CCFG input Cell in series configuration input. Sets the number of cells the device is configured to monitor.
18 CTRC input CHG override input. In a stacked configuration, receives the CHGU signal from the device above to force the CHG driver state.
19 CTRD input DSG override input. In a stacked configuration, receives the DSG signal from the device above to force the DSG driver state.
20 DVSS power_in Digital ground reference for the internal digital circuitry.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Power Management (PMIC)
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • BQ7790509PWR

CAD (KiCad official)

  • Symbol: BQ7790509PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 f04162b24e7e7c22, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF