component
BQ40Z50RSMR-R1
Public Unreviewedby Ray
Texas Instruments Battery Management, VQFN-32-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBQ40Z50RSMR-R1
Texas Instruments · Battery Management · VQFN-32-EP(4x4)
BQ40Z50RSMR-R1 from Texas Instruments, in a VQFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PBI | power_in | Power supply backup input pin. Backup rail that maintains RAM/RTC context when primary supplies are lost. |
| 2 | VC4 | input | Sense voltage input for the most positive cell (Cell 4) and balance current input for that cell. |
| 3 | VC3 | input | Sense voltage input for second-most-positive cell (Cell 3), balance current input, and return path for Cell 4 balance current. |
| 4 | VC2 | input | Sense voltage input for third-most-positive cell (Cell 2), balance current input, and return path for Cell 3 balance current. |
| 5 | VC1 | input | Sense voltage input for the least positive cell (Cell 1), balance current input, and return path for Cell 2 balance current. |
| 6 | SRN | input | Coulomb-counter negative sense input. Integrates the small voltage across the sense resistor between SRP and SRN. |
| 7 | NC | unconnected | Not internally connected. Connect to VSS per the datasheet. |
| 8 | SRP | input | Coulomb-counter positive sense input; top of the sense resistor. Integrates the small voltage between SRP and SRN. |
| 9 | VSS | power_in | Device ground reference. |
| 10 | TS1 | input | Temperature sensor 1 thermistor input (NTC). Ratiometric input via internal 18 kΩ pull-up to 1.8 V. |
| 11 | TS2 | input | Temperature sensor 2 thermistor input. |
| 12 | TS3 | input | Temperature sensor 3 thermistor input. |
| 13 | TS4 | input | Temperature sensor 4 thermistor input. |
| 14 | NC | unconnected | Not internally connected. |
| 15 | BTP_INT | output | Battery Trip Point interrupt output. Signals the host when configured state-of-charge thresholds are crossed. |
| 16 | PRES/SHUTDN | input | Host-present input for removable packs, or emergency system-shutdown input for embedded packs. Function is firmware-configurable. |
| 17 | DISP | input | Display control input for the LED state-of-charge indicator. Asserting this pin activates the LEDCNTLA/B/C outputs. |
| 18 | SMBD | bidirectional | SMBus data line (open-drain). Compatible with SMBus v1.1; requires external pull-up. |
| 19 | SMBC | bidirectional | SMBus clock line (open-drain). Compatible with SMBus v1.1; requires external pull-up. |
| 20 | LEDCNTLA | output | LED display segment A output; drives external LEDs per firmware configuration (fuel gauge display). |
| 21 | LEDCNTLB | output | LED display segment B output; drives external LEDs per firmware configuration. |
| 22 | LEDCNTLC | output | LED display segment C output; drives external LEDs per firmware configuration. |
| 23 | PTC | input | Safety PTC thermistor input. Tie both PTC and PTCEN to VSS to disable the PTC safety detector. |
| 24 | PTCEN | input | PTC enable input. Connect to BAT to enable PTC detection; tie both PTC and PTCEN to VSS to disable. |
| 25 | FUSE | output | Fuse drive output. Drives an external chemical fuse to permanently disable the pack under 2nd-level safety events. |
| 26 | VCC | power_in | Secondary power supply input (typically PACK-side sourced through a diode) for the internal LDO/regulators. |
| 27 | PACK | input | Pack-side voltage sense input. Monitors PACK+ node for insertion/removal and pre-charge control. |
| 28 | DSG | output | High-side N-channel discharge FET gate drive output. Charge-pumped above BAT to fully enhance the external DSG FET. |
| 29 | NC | unconnected | Not internally connected. |
| 30 | PCHG | output | P-channel pre-charge FET gate drive output. |
| 31 | CHG | output | High-side N-channel charge FET gate drive output. Charge-pumped above BAT to fully enhance the external CHG FET. |
| 32 | BAT | power_in | Primary power supply input pin, connected to the top of the cell stack. |
| 33 | EP | passive | Exposed thermal pad on the underside of the VQFN package. Solder to the PCB ground plane for thermal and mechanical performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(4x4) |
| Category | PMIC |
| Pins | 33 |
Ordering variants
Same part, different packaging or reel option.
BQ40Z50RSMR-R1BQ40Z50RSMR-R1RSMT
CAD (KiCad official)
- Symbol:
BQ40Z50RSMR-R1 - Footprint:
Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: VQFN-32-EP(4x4) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (55 pp, sha256
8fb42a3177aabd62, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).