Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

BQ25886RGER

Texas Instruments · Battery Management · VQFN-24-EP(4x4)

BQ25886RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D- bidirectional Negative USB data line. D+/D- based USB host/charging port detection including data contact detection (DCD) and secondary detection per BC1.2.
2 STAT output Open-drain charge status indicator. Connect to pull-up rail via 10kΩ resistor. LOW indicates charge in progress; HIGH indicates charge complete or charge disabled. Blinks at 1Hz when a fault occurs.
3 /CE input Active-low charge enable. Battery charging is enabled when /CE is LOW. Internally pulled low via 900kΩ resistor.
4 GND power_in Ground return.
5 OTG input USB On-the-Go enable input. Pull high to enable OTG (boost) function; pull low to disable.
6 VSET input Battery charge voltage limit. Resistor pull-down from VSET to GND sets regulation voltage: <18kΩ (short) = 8.2V, 39kΩ = 8.8V, 75kΩ = 8.7V, >150kΩ (floating) = 8.4V (all ±10%).
7 TS input Temperature qualification voltage. Connect NTC thermistor (103AT-2 recommended). Program temperature window with a resistor divider from REGN to TS to GND. Charge suspends when TS is out of range.
8 ILIM input Input current limit (IINDPM). Resistor to GND sets maximum input current: IINMAX = KILIM / RILIM (KILIM x 0.8V). IINDPM loop regulates ILIM voltage at 0.8V. Do not float. Min limit 500mA not supported.
9 /PG output Open-drain active-low power good indicator. Connect to pull-up rail via 10kΩ resistor. LOW indicates a good input source when VBUS is within VVBUS_OP (3.9V). Can sink more than IPOORSRC (30mA).
10 ICHGSET input Charge current limit. Resistor from ICHGSET to GND programs charge current in the range 30mA (114Ω) to 2.2A (8kΩ). Pre-charge/termination current is 1/10 of fast charge (min pre-charge 30mA, min termination 10mA). Short to GND = min 30mA; floating = disable charge.
11 REGN power_out Gate drive supply. Bias supply for internal MOSFET drivers and IC. Bypass to GND with a 4.7µF ceramic capacitor. REGN current limit is 50mA.
12 BTST power_in PWM high-side driver supply. Internally connected to the cathode of the boot-strap diode. Connect a 47nF bootstrap capacitor from SW to BTST.
13 BAT power_out Battery power connection. Connect minimum recommended 10µF (after derating) capacitance closely to BAT pin and GND.
14 BAT power_out Battery power connection. Connect minimum recommended 10µF (after derating) capacitance closely to BAT pin and GND.
15 SYS power_out System connection. Internal BATFET is between SYS and BAT. Switch-mode converter keeps SYS above minimum system voltage when battery is below that level. Connect 2x22µF (after derating) between SYS and PGND.
16 SYS power_out System connection. Internal BATFET is between SYS and BAT. Switch-mode converter keeps SYS above minimum system voltage when battery is below that level. Connect 2x22µF (after derating) between SYS and PGND.
17 SW power_out Inductor connection. Connect to the switched side of the external inductor.
18 SW power_out Inductor connection. Connect to the switched side of the external inductor.
19 GND power_in Ground return.
20 GND power_in Ground return.
21 PMID power_in Blocking MOSFET connection. Minimum recommended total input low-ESR capacitance on VBUS and PMID (after derating) is 10µF; at least 1µF on VBUS, remainder on PMID (typical 10µF).
22 PMID power_in Blocking MOSFET connection. Minimum recommended total input low-ESR capacitance on VBUS and PMID (after derating) is 10µF; at least 1µF on VBUS, remainder on PMID (typical 10µF).
23 VBUS power_in Input supply. Connected to the external DC supply (4.3V to 6.2V operating). Bypass VBUS to GND with at least 1µF ceramic capacitor placed as close to the IC as possible.
24 D+ bidirectional Positive USB data line. D+/D- based USB host/charging port detection including data contact detection (DCD) and secondary detection per BC1.2.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category PMIC
Pins 24

Ordering variants

Same part, different packaging or reel option.

  • BQ25886RGER
  • BQ25886RGERRGET

CAD (KiCad official)

  • Symbol: BQ25886RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 c62b2e45b2566342, retrieved 2026-08-17, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF