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bq25616rtwr

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Texas Instruments Battery Management, QFN-24-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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BQ25616RTWR

Texas Instruments · Battery Management · QFN-24-EP(4x4)

BQ25616RTWR from Texas Instruments, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VAC power_in Charger input voltage sensing pin. Optional external N-channel ACFET can be placed between VAC and VBUS; when VAC is between UVLO and the 14.2 V ACOV threshold the ACDRV charge pump turns ACFET on. Short VAC to VBUS if ACFET is not used.
2 ACDRV output Charge-pump gate-drive output for the external N-channel ACFET. Provides ~6 V above VBUS to turn the ACFET on when VAC is above UVLO and below the 14.2 V ACOV threshold. Leave floating if external OVP is not used.
3 D+ bidirectional Positive USB data line. Used for D+/D- based USB host/charging-port detection including DCD, primary/secondary BC1.2 detection and non-standard adapter detection.
4 D- bidirectional Negative USB data line. Used for D+/D- based USB host/charging-port detection including DCD, primary/secondary BC1.2 detection and non-standard adapter detection.
5 STAT output Open-drain charger status output. Pull up to a logic rail via 10 kΩ. LOW = charge in progress; HIGH = charge complete or SLEEP; blinks at 1 Hz on fault (charge suspend).
6 OTG input Boost (USB OTG) mode enable input. HIGH enables the 5 V boost converter (up to 1.2 A). Must not be left floating.
7 PG output Open-drain active-low power-good indicator. Pull up to a logic rail via 10 kΩ. LOW when input voltage is between UVLO and ACOV, above SLEEP threshold, and input current limit is above 30 mA.
8 ILIM input Programs the input current limit (IINDPM) when the adapter is detected as unknown. Connect a resistor to GND: IINDPM = K_ILIM / R_ILIM. Programmable range 500 mA to 3200 mA.
9 CE input Active-low charge-enable digital input. Battery charging is enabled when this pin is driven LOW.
10 ICHG input Sets the fast-charge current limit via a resistor to GND: ICHG = K_ICHG / R_ICHG. Programmable range 300 mA to 3000 mA.
11 TS input Battery temperature-sense input for an external NTC (recommended 103AT-2). Program the temperature window with a REGN-TS-GND resistor divider; charge and boost are suspended when TS is out of range. Tie 10 kΩ from REGN to TS and 10 kΩ from TS to GND when unused. BQ25616 uses Hot/Cold profile; BQ25616J uses JEITA.
12 VSET input Sets the default battery regulation voltage via a resistor to GND. R_VSET > 50 kΩ (float) = 4.208 V; R_VSET < 500 Ω (short) = 4.352 V; 5 kΩ < R_VSET < 25 kΩ = 4.100 V.
13 BAT power_in Battery pack positive terminal. Internal current-sense resistor sits between SYS and BAT. Place a 10 µF ceramic capacitor close to the BAT pin (pins 13 and 14 are tied together internally).
14 BAT power_in Battery pack positive terminal (parallel with pin 13). Internal current-sense resistor sits between SYS and BAT. Tie externally to pin 13.
15 SYS power_out System output connection (Power Path output). Internal sense resistor is between SYS and BAT. Place at least a 10 µF ceramic capacitor close to the SYS pin (pins 15 and 16 are tied together internally).
16 SYS power_out System output connection (parallel with pin 15). Tie externally to pin 15.
17 GND power_in Device power and signal ground. Tie to the ground plane along with pin 18 and the thermal pad.
18 GND power_in Device power and signal ground. Tie to the ground plane along with pin 17 and the thermal pad.
19 SW passive Buck/boost switch node connecting to the external inductor. Internally the source of the HSFET and drain of the LSFET. Connect the 0.047 µF bootstrap capacitor between SW and BTST (pins 19 and 20 are tied together internally).
20 SW passive Buck/boost switch node (parallel with pin 19). Tie externally to pin 19.
21 BTST passive PWM high-side driver bootstrap supply. Cathode of the internal boot-strap diode. Connect a 0.047 µF ceramic capacitor from SW to BTST.
22 REGN power_out Internal LDO output, PWM low-side driver supply and anode of the boot-strap diode. Bypass with a 4.7 µF (10 V) ceramic capacitor to GND placed close to the IC. Do not load externally beyond the TS resistor divider.
23 PMID power_in Drain of the internal reverse-blocking MOSFET (RBFET) and drain of the HSFET. Place a 10 µF ceramic capacitor from PMID to GND.
24 VBUS power_in Charger input from USB / adapter. Source of the internal N-channel RBFET (drain at PMID). Place a 1 µF ceramic capacitor from VBUS to GND as close as possible to the device.
PAD GND power_in Exposed thermal pad. Serves both as electrical ground for the device and the primary thermal path from die to PCB. Tie to the ground plane with a dense via array.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-24-EP(4x4)
Category PMIC
Pins 25

Ordering variants

  • BQ25616RTWR
  • BQ25616RTWRRTWT

CAD (KiCad official)

  • Symbol: BQ25616RTWR
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 9c125bb15fce80e0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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