BQ24195LRGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBUS	power_in	Charger input voltage from USB/adapter (3.9-17 V, abs max 22 V). Internal n-channel reverse block MOSFET (RBFET) between VBUS and PMID. Place a 1-uF ceramic capacitor from VBUS to PGND close to the IC. Pins 1 and 24 are tied together.
2	D+	bidirectional	Positive line of the USB data pair. Used for USB BC 1.2 host/charging-port detection including data contact detection (DCD) and primary detection.
3	D-	bidirectional	Negative line of the USB data pair. Used for USB BC 1.2 host/charging-port detection including data contact detection (DCD) and primary detection.
4	STAT	output	Open-drain charge status output. LOW = charge in progress; HIGH = charge complete or disabled; blinks at 1 Hz on fault. Connect to logic rail via 10-kohm pull-up. Sink current up to 6 mA.
5	SCL	input	I2C interface clock. Connect to the logic rail through a 10-kohm pull-up resistor.
6	SDA	bidirectional	I2C interface data. Connect to the logic rail through a 10-kohm pull-up resistor.
7	INT	output	Open-drain interrupt output. Sends an active-low 256-us pulse to the host to report device status and faults. Connect to logic rail via 10-kohm pull-up. Sink current up to 6 mA.
8	OTG	input	USB current-limit selection in buck mode and active-high boost enable. In buck mode: OTG=High selects IIN=500 mA, OTG=Low selects IIN=100 mA. Boost mode is activated when REG01[5:4]=10 and OTG is High.
9	CE	input	Active-low charge enable pin (~CE). Charging is enabled when REG01[5:4]=01 and CE=Low. Must be pulled high or low, never floated.
10	ILIM	input	Maximum input current limit set by a resistor from ILIM to GND while the ILIM voltage is regulated to 1 V. IINMAX = (1 V / RILIM) x 530. Actual limit is the lower of ILIM and I2C REG00[2:0]. Minimum programmable IIN is 500 mA on this pin.
11	TS1	input	Battery temperature qualification voltage input #1. Program the thermistor temperature window with a resistor divider from REGN to TS1 to GND. Charge suspends when either TS pin is out of range. TI recommends a 103AT-2 NTC thermistor.
12	TS2	input	Battery temperature qualification voltage input #2. TS1 and TS2 must be shorted together.
13	BAT	power_in	Battery connection to the positive terminal of the pack (single-cell Li-Ion/Li-polymer). Internal BATFET is between BAT and SYS. Place a 10-uF ceramic capacitor close to the BAT pin. Pins 13 and 14 tied together.
14	BAT	power_in	Battery connection (tied to pin 13).
15	SYS	power_out	System output connection. Regulated slightly above battery voltage; kept above minimum system voltage by switch-mode converter when battery is depleted or removed. Pins 15 and 16 tied together.
16	SYS	power_out	System output (tied to pin 15).
17	PGND	power_in	Power ground of the high-current switch-mode converter (source of the n-channel LSFET). On PCB, connect directly to the ground pins of input and output capacitors; star-connect to analog GND. Pins 17 and 18 tied together.
18	PGND	power_in	Power ground (tied to pin 17).
19	SW	output	Switching node of the buck/boost converter connecting to the output inductor. Internally the source of the HSFET and drain of the LSFET. Bootstrap capacitor connects from SW to BTST. Pins 19 and 20 tied together.
20	SW	output	Switching node (tied to pin 19).
21	BTST	power_in	PWM high-side driver positive supply (bootstrap). Anode of the internal bootstrap diode. Connect a 0.047-uF bootstrap capacitor from SW to BTST.
22	REGN	power_out	PWM low-side driver positive supply output (cathode of the internal bootstrap diode). Connect a 4.7-uF/10-V ceramic capacitor from REGN to analog GND close to the IC. Also biases TS1/TS2 dividers.
23	PMID	power_out	Battery boost mode output voltage / midpoint between RBFET and HSFET. Requires a minimum 20-uF (bq24195L) capacitor from PMID to PGND.
24	VBUS	power_in	Charger input voltage (tied to pin 1).
25	EP	power_in	Exposed thermal pad beneath the IC for heat dissipation. Always solder the pad to the board with vias star-connecting to PGND and the ground plane of the power converter.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-24-EP(4x4)
Category	PMIC
Pins	25

Ordering variants

Same part, different packaging or reel option.

BQ24195LRGER
BQ24195LRGERRGET

CAD (KiCad official)

Symbol: BQ24195LRGER
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (50 pp, sha256 14d39621d2dacc98, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF