BQ24072RGTR
Public Unreviewedby Ray
Texas Instruments Battery Management, QFN-16-EP(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownBQ24072RGTR
Texas Instruments · Battery Management · QFN-16-EP(3x3)
BQ24072RGTR from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TS | input | External NTC thermistor input. Connect to a 10-kΩ NTC thermistor in the battery pack; monitors pack temperature and pauses charging when out of range. Tie to VSS through a 10-kΩ fixed resistor if unused. |
| 2 | BAT | power_out | Charger power-stage output and battery voltage-sense input. Connect to the positive terminal of the 1-cell Li-Ion battery and bypass to VSS with a 4.7-µF to 47-µF ceramic capacitor. Pins 2 and 3 must be tied together. |
| 3 | BAT | power_out | Charger power-stage output and battery voltage-sense input (see pin 2). Pins 2 and 3 must be tied together. |
| 4 | CE | input | Charge Enable active-low input. Drive low to enable charging; drive high to disable charging (OUT and battery supplement mode remain available). Internally pulled down (~285 kΩ); must not be left floating. |
| 5 | EN2 | input | Input Current Limit configuration input (MSB). Together with EN1 selects USB100 / USB500 / ILIM-resistor / Standby modes (see EN1/EN2 table). Internally pulled down (~285 kΩ); do not leave floating. |
| 6 | EN1 | input | Input Current Limit configuration input (LSB). Together with EN2 selects USB100 / USB500 / ILIM-resistor / Standby modes. Internally pulled down (~285 kΩ); do not leave floating. |
| 7 | PGOOD | output | Open-drain Power-Good status output. Pulls to VSS when a valid input source is detected on IN; high-impedance otherwise. Pull up to a logic rail through 1 kΩ-100 kΩ, or drive an indicator LED. |
| 8 | VSS | power_in | Device ground. Must be connected to the ground rail of the circuit and to the exposed thermal pad. |
| 9 | CHG | output | Open-drain charge-status indicator output (active-low, CHG-bar). Pulls to VSS while the battery is charging; high-impedance when charging is complete or disabled. Pull up to logic rail through 1 kΩ-100 kΩ or use with an LED. |
| 10 | OUT | power_out | System supply output from the power-path stage. Regulated when the input is within the valid operating range; otherwise tracks V_BAT. Bypass to VSS with 4.7-µF to 47-µF ceramic capacitor. Pins 10 and 11 must be tied together. |
| 11 | OUT | power_out | System supply output (see pin 10). Pins 10 and 11 must be tied together. |
| 12 | ILIM | input | Adjustable current-limit programming input. Connect a 1100-Ω to 8-kΩ resistor from ILIM to VSS to set the maximum input current when EN2=1, EN1=0. Leave floating to disable all charging. |
| 13 | IN | power_in | Input power connection from an AC adapter or USB port. Operating range 4.35 V to 6.6 V (BQ24072); withstands up to 26 V without damage (operation suspended above OVP). Bypass to VSS with a 1-µF to 10-µF ceramic capacitor. |
| 14 | TMR | input | Safety-timer programming input. Connect an 18-kΩ to 72-kΩ resistor from TMR to VSS to set the pre-charge and fast-charge timers; tie to VSS to disable all safety timers; leave open for default timer values. |
| 15 | TD | input | Termination Disable input. Drive high to disable charge termination; tie to VSS to enable termination. Sampled only at startup and cannot be changed during operation. Internally pulled down (~285 kΩ); do not leave floating. |
| 16 | ISET | bidirectional | Fast-charge current programming input / monitor. Connect a 590-Ω to 8.9-kΩ resistor from ISET to VSS to set fast-charge current. Voltage at ISET mirrors the actual charge current and can be used to monitor it. Leaving open disables charging. |
| 17 | PAD | power_in | Exposed thermal pad on package underside. Internally connected to VSS; must be soldered to the PCB ground plane for thermal dissipation and tied to the same potential as pin 8. Do not use as the primary ground input - VSS pin must also be grounded. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-16-EP(3x3) |
| Category | PMIC |
| Pins | 17 |
Ordering variants
Same part, different packaging or reel option.
BQ24072RGTRBQ24072RGTRRGTTBQ24073RGTRBQ24073RGTTBQ24074RGTRBQ24074RGTTBQ24075RGTRBQ24075RGTTBQ24079RGTRBQ24079RGTT
CAD (KiCad official)
- Symbol:
BQ24072RGTR - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
bq24072rgtr.step |
190 KB | You want the bare part, or you mark your own boards. |
bq24072rgtr-etched.step |
2.3 MB | You want the part with BQ24072RGTR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 571 faces against 110 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
05585ca0112a74b0, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).