BL6552
Public Unreviewedby Ray
BL Shanghai Belling Supervisor and Reset ICs, QFN-36-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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markdownBL6552
BL Shanghai Belling · Supervisor and Reset ICs · QFN-36-EP(6x6)
BL6552 from BL Shanghai Belling, in a QFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INP | input | Neutral-line current channel positive differential input. Max differential voltage per pair ±0.7V. |
| 2 | VREF | bidirectional | Internal 1.2V reference voltage; can be used as reference input or output. Decouple externally. |
| 3 | VAN | input | Phase-A voltage channel negative differential input. Max differential voltage per pair ±0.7V. |
| 4 | VAP | input | Phase-A voltage channel positive differential input. |
| 5 | VBN | input | Phase-B voltage channel negative differential input. Max differential voltage per pair ±0.7V. |
| 6 | VBP | input | Phase-B voltage channel positive differential input. |
| 7 | VCN | input | Phase-C voltage channel negative differential input. Max differential voltage per pair ±0.7V. |
| 8 | VCP | input | Phase-C voltage channel positive differential input. |
| 9 | NRST | input | Active-low reset input. |
| 10 | AGND | power_in | Analog ground. |
| 11 | DGND | power_in | Digital ground. |
| 12 | CS | input | SPI chip-select input when SEL=1; when SEL=0 acts as UART baud-rate select input. |
| 13 | SDO | output | SPI MISO / UART TX output data pin (function selected by SEL). |
| 14 | SDI | input | SPI MOSI / UART RX input data pin (function selected by SEL). |
| 15 | SCLK | input | SPI clock input when SEL=1; when SEL=0 acts as UART baud-rate select input. |
| 16 | IRQ1 | output | Interrupt-status logic output 1. |
| 17 | IRQ2 | output | Interrupt-status logic output 2. |
| 18 | CLKOUT | output | Crystal oscillator output pin (connect to external 8MHz crystal). |
| 19 | CLKIN | input | Crystal oscillator input pin; external crystal frequency 8MHz. |
| 20 | VPP | power_in | Reserved power pin; may be left floating. |
| 21 | CF1 | output | Calibration pulse output 1 (active-power energy pulse). |
| 22 | CF2 | output | Calibration pulse output 2 (reactive-power energy pulse). |
| 23 | AT1 | output | Configurable logic output 1 (programmable status indication). |
| 24 | AT2 | output | Configurable logic output 2 (programmable status indication). |
| 25 | AT3 | output | Configurable logic output 3 (programmable status indication). |
| 26 | DVDD18 | power_out | Internal 1.8V digital LDO output; connect an external 0.1µF filter capacitor to GND. |
| 27 | SEL | input | Interface select input: 0 (default) selects UART, 1 selects SPI. |
| 28 | DVDD | power_in | Digital 3.3V supply input. |
| 29 | AVDD | power_in | Analog 3.3V supply input. |
| 30 | ICN | input | Phase-C current channel negative differential input. Max differential voltage per pair ±0.7V. |
| 31 | ICP | input | Phase-C current channel positive differential input. |
| 32 | IBN | input | Phase-B current channel negative differential input. Max differential voltage per pair ±0.7V. |
| 33 | IBP | input | Phase-B current channel positive differential input. |
| 34 | IAN | input | Phase-A current channel negative differential input. Max differential voltage per pair ±0.7V. |
| 35 | IAP | input | Phase-A current channel positive differential input. |
| 36 | INN | input | Neutral-line current channel negative differential input. Max differential voltage per pair ±0.7V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BL Shanghai Belling |
| Package | QFN-36-EP(6x6) |
| Category | PMIC |
| Pins | 36 |
CAD (KiCad official)
- Symbol:
BL6552 - Footprint:
Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm - 3D model: QFN-36-EP(6x6) (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
bl6552.step |
396 KB | You want the bare part, or you mark your own boards. |
bl6552-etched.step |
2.0 MB | You want the part with BL6552 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 493 faces against 230 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BL Shanghai Belling datasheet (80 pp, sha256
4b18cbf018c6a304, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).