BL1118CS8TR1833
Public Unreviewedby Ray
BL Shanghai Belling Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownBL1118CS8TR1833
BL Shanghai Belling · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · ESOP-8
BL1118CS8TR1833 from BL Shanghai Belling, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Channel 1 ground return. On adjustable versions this pin becomes the ADJ (feedback) pin, but on the BL1118CS8TR1833 (fixed 1.8V CH1) it is tied to ground. |
| 2 | Vin1 | power_in | Channel 1 supply input. Absolute maximum 12V; requires a 10uF bypass capacitor (Cin1) to ground close to the pin. |
| 3 | GND | power_in | Channel 2 ground return. On adjustable versions this pin becomes the ADJ (feedback) pin, but on the BL1118CS8TR1833 (fixed 3.3V CH2) it is tied to ground. |
| 4 | Vin2 | power_in | Channel 2 supply input. Absolute maximum 12V; requires a 10uF bypass capacitor (Cin2) to ground close to the pin. |
| 5 | Vout2 | power_out | Channel 2 regulated output (3.3V on the -1833 variant, up to 1A). Tie in parallel with pin 6 and bypass with a 10uF output capacitor. |
| 6 | Vout2 | power_out | Channel 2 regulated output (paralleled with pin 5) for current sharing to the 1A load. |
| 7 | Vout1 | power_out | Channel 1 regulated output (paralleled with pin 8) for current sharing to the 1A load. |
| 8 | Vout1 | power_out | Channel 1 regulated output (1.8V on the -1833 variant, up to 1A). Tie in parallel with pin 7 and bypass with a 10uF output capacitor. |
| 9 | EP | power_in | Exposed thermal pad on the ESOP-8 package underside. Solder to the PCB ground copper pour for heat dissipation (θJC = 10°C/W, θJA = 63°C/W). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BL Shanghai Belling |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
BL1118CS8TR1833
CAD (KiCad official)
- Symbol:
BL1118CS8TR1833 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
bl1118cs8tr1833.step |
125 KB | You want the bare part, or you mark your own boards. |
bl1118cs8tr1833-etched.step |
3.4 MB | You want the part with BL1118CS8TR1833 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 802 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BL Shanghai Belling datasheet (8 pp, sha256
85526dbc6c09a729, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).