component
ATTINY104-SSNR
Public Unreviewedby Ray
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗README
markdownATTINY104-SSNR
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOIC-14
ATTINY104-SSNR from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Digital supply voltage. Operating range 1.8-5.5 V (external programming requires 2.7-5.5 V). Decouple locally with a 100 nF ceramic capacitor to GND. |
| 2 | PA0/PCINT0/T0/CLKI/AIN0/ADC0/TPICLK | bidirectional | Port A bit 0. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: external clock input (CLKI), TC0 external clock (T0), analog comparator positive input (AIN0), ADC channel 0, pin-change interrupt PCINT0, and TPI programming clock (TPICLK). |
| 3 | PA1/PCINT1/OC0B/AIN1/ADC1/TPIDATA | bidirectional | Port A bit 1. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: TC0 compare-match B output (OC0B), analog comparator negative input (AIN1), ADC channel 1, pin-change interrupt PCINT1, and TPI programming data (TPIDATA). |
| 4 | PA2/PCINT2/RESET | bidirectional | Port A bit 2, also the external RESET input. A low level longer than the minimum pulse length generates a reset even when the clock is not running (provided the reset function has not been disabled). May alternatively be used as a weak I/O pin or as pin-change interrupt PCINT2. |
| 5 | PA3/PCINT3/OC0A | bidirectional | Port A bit 3. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: TC0 compare-match A output (OC0A, alternate location when T/C Remap is enabled) and pin-change interrupt PCINT3. |
| 6 | PA4/PCINT4/ICP0 | bidirectional | Port A bit 4. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: TC0 input-capture (ICP0, alternate location with T/C Remap) and pin-change interrupt PCINT4. |
| 7 | PA5/PCINT5/OC0B/ADC2 | bidirectional | Port A bit 5. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: ADC channel 2, TC0 compare-match B output (OC0B, alternate location with T/C Remap), and pin-change interrupt PCINT5. |
| 8 | PA6/PCINT6/ADC3 | bidirectional | Port A bit 6. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: ADC channel 3 and pin-change interrupt PCINT6. |
| 9 | PA7/PCINT7 | bidirectional | Port A bit 7. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternate: pin-change interrupt PCINT7. |
| 10 | PB0/PCINT8/ADC4 | bidirectional | Port B bit 0. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: ADC channel 4 and pin-change interrupt PCINT8. |
| 11 | PB1/PCINT9/INT0/CLKO/XCK0/OC0A/ADC5 | bidirectional | Port B bit 1. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: external interrupt INT0, system clock output CLKO, USART0 external clock XCK0, TC0 compare-match A output (OC0A, primary location), ADC channel 5, and pin-change interrupt PCINT9. |
| 12 | PB2/PCINT10/ICP0/TxD0/ADC6 | bidirectional | Port B bit 2. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: TC0 input-capture (ICP0, primary location), USART0 transmit data (TxD0), ADC channel 6, and pin-change interrupt PCINT10. |
| 13 | PB3/PCINT11/T0/RxD0/ACO/ADC7 | bidirectional | Port B bit 3. General-purpose bidirectional I/O with individually selectable internal pull-up; symmetrical high sink/source drive. Muxed alternates: TC0 external clock (T0, alternate location with T/C Remap), USART0 receive data (RxD0), analog comparator output (ACO), ADC channel 7, and pin-change interrupt PCINT11. |
| 14 | GND | power_in | Ground reference for the digital supply and all I/O. Connect directly to the system ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
ATTINY104-SSNRATTINY104-SSNRSSFRATTINY104-SSNRF-SSNRATTINY104-SSNRF-SSFRATTINY104-SSNRM7RATTINY104-SSNRM8RATTINY104-SSNRF-M7RATTINY104-SSNRF-M8R
CAD (KiCad official)
- Symbol:
ATTINY104-SSNR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (None pp, sha256
53bde81c2835d14d, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).