ATSAMD21G18A-MU from Microchip, in a QFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PA00	bidirectional	Port A GPIO. Muxed: EXTINT[0], SERCOM1/PAD[0] (USART/SPI/I2C), TCC2/WO[0]. Powered from VDDANA.
2	PA01	bidirectional	Port A GPIO. Muxed: EXTINT[1], SERCOM1/PAD[1], TCC2/WO[1]. Powered from VDDANA.
3	PA02	bidirectional	Port A GPIO. Muxed: EXTINT[2], ADC AIN[0], PTC Y[0], DAC VOUT, TCC3/WO[0]. Powered from VDDANA.
4	PA03	bidirectional	Port A GPIO. Muxed: EXTINT[3], ADC/DAC VREFA input, ADC AIN[1], PTC Y[1], TCC3/WO[1]. Powered from VDDANA.
5	GNDANA	power_in	Analog ground return for VDDANA supply and the internal analog blocks (ADC, DAC, AC, references).
6	VDDANA	power_in	Analog supply, 1.62-3.63 V. Powers the ADC, DAC, analog comparators, references, and the VDDANA-domain PORT pins. Must be decoupled and typically tied to VDDIN.
7	PB08	bidirectional	Port B GPIO. Muxed: EXTINT[8], ADC AIN[2], PTC Y[14], SERCOM4/PAD[0], TC4/WO[0], TCC3/WO[6]. Powered from VDDANA.
8	PB09	bidirectional	Port B GPIO. Muxed: EXTINT[9], ADC AIN[3], PTC Y[15], SERCOM4/PAD[1], TC4/WO[1], TCC3/WO[7]. Powered from VDDANA.
9	PA04	bidirectional	Port A GPIO. Muxed: EXTINT[4], ADC/VREFB input, ADC AIN[4], AC AIN[0], PTC Y[2], SERCOM0/PAD[0], TCC0/WO[0], TCC3/WO[2]. Powered from VDDANA.
10	PA05	bidirectional	Port A GPIO. Muxed: EXTINT[5], ADC AIN[5], AC AIN[1], PTC Y[3], SERCOM0/PAD[1], TCC0/WO[1], TCC3/WO[3]. Powered from VDDANA.
11	PA06	bidirectional	Port A GPIO. Muxed: EXTINT[6], ADC AIN[6], AC AIN[2], PTC Y[4], SERCOM0/PAD[2], TCC1/WO[0], TCC3/WO[4]. Powered from VDDANA.
12	PA07	bidirectional	Port A GPIO. Muxed: EXTINT[7], ADC AIN[7], AC AIN[3], PTC Y[5], SERCOM0/PAD[3], TCC1/WO[1], TCC3/WO[5], I2S/SD[0]. Powered from VDDANA.
13	PA08	bidirectional	Port A GPIO. Muxed: NMI, ADC AIN[16], PTC X[0], SERCOM0/PAD[0], SERCOM2/PAD[0], TCC0/WO[0], TCC1/WO[2], I2S/SD[1]. Powered from VDDIO.
14	PA09	bidirectional	Port A GPIO. Muxed: EXTINT[9], ADC AIN[17], PTC X[1], SERCOM0/PAD[1], SERCOM2/PAD[1], TCC0/WO[1], TCC1/WO[3], I2S/MCK[0]. Powered from VDDIO.
15	PA10	bidirectional	Port A GPIO. Muxed: EXTINT[10], ADC AIN[18], PTC X[2], SERCOM0/PAD[2], SERCOM2/PAD[2], TCC1/WO[0], TCC0/WO[2], I2S/SCK[0], GCLK_IO[4]. Powered from VDDIO.
16	PA11	bidirectional	Port A GPIO. Muxed: EXTINT[11], ADC AIN[19], PTC X[3], SERCOM0/PAD[3], SERCOM2/PAD[3], TCC1/WO[1], TCC0/WO[3], I2S/FS[0], GCLK_IO[5]. Powered from VDDIO.
17	VDDIO	power_in	Digital I/O supply, 1.62-3.63 V. Powers the VDDIO-domain PORT pins. Must be decoupled locally.
18	GND	power_in	Digital ground return for the VDDIO and VDDCORE domains.
19	PB10	bidirectional	Port B GPIO. Muxed: EXTINT[10], SERCOM4/PAD[2], TC5/WO[0], TCC0/WO[4], I2S/MCK[1], GCLK_IO[4]. Powered from VDDIO.
20	PB11	bidirectional	Port B GPIO. Muxed: EXTINT[11], SERCOM4/PAD[3], TC5/WO[1], TCC0/WO[5], I2S/SCK[1], GCLK_IO[5]. Powered from VDDIO.
21	PA12	bidirectional	Port A GPIO. Muxed: EXTINT[12], SERCOM2/PAD[0], SERCOM4/PAD[0], TCC2/WO[0], TCC0/WO[6], AC/CMP[0]. Powered from VDDIO.
22	PA13	bidirectional	Port A GPIO. Muxed: EXTINT[13], SERCOM2/PAD[1], SERCOM4/PAD[1], TCC2/WO[1], TCC0/WO[7], AC/CMP[1]. Powered from VDDIO.
23	PA14	bidirectional	Port A GPIO. Muxed: EXTINT[14], SERCOM2/PAD[2], SERCOM4/PAD[2], TC3/WO[0], TCC0/WO[4], GCLK_IO[0]. Powered from VDDIO.
24	PA15	bidirectional	Port A GPIO. Muxed: EXTINT[15], SERCOM2/PAD[3], SERCOM4/PAD[3], TC3/WO[1], TCC0/WO[5], GCLK_IO[1]. Powered from VDDIO.
25	PA16	bidirectional	Port A GPIO. Muxed: EXTINT[0], PTC X[4], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6], GCLK_IO[2]. Powered from VDDIO.
26	PA17	bidirectional	Port A GPIO. Muxed: EXTINT[1], PTC X[5], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7], GCLK_IO[3]. Powered from VDDIO.
27	PA18	bidirectional	Port A GPIO. Muxed: EXTINT[2], PTC X[6], SERCOM1/PAD[2], SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[2], AC/CMP[0]. Powered from VDDIO.
28	PA19	bidirectional	Port A GPIO. Muxed: EXTINT[3], PTC X[7], SERCOM1/PAD[3], SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[3], I2S/SD[0], AC/CMP[1]. Powered from VDDIO.
29	PA20	bidirectional	Port A GPIO. Muxed: EXTINT[4], PTC X[8], SERCOM5/PAD[2], SERCOM3/PAD[2], TC7/WO[0], TCC0/WO[6], I2S/SCK[0], GCLK_IO[4]. Powered from VDDIO.
30	PA21	bidirectional	Port A GPIO. Muxed: EXTINT[5], PTC X[9], SERCOM5/PAD[3], SERCOM3/PAD[3], TC7/WO[1], TCC0/WO[7], I2S/FS[0], GCLK_IO[5]. Powered from VDDIO.
31	PA22	bidirectional	Port A GPIO. Muxed: EXTINT[6], PTC X[10], SERCOM3/PAD[0], SERCOM5/PAD[0], TC4/WO[0], TCC0/WO[4], GCLK_IO[6]. Powered from VDDIO.
32	PA23	bidirectional	Port A GPIO. Muxed: EXTINT[7], PTC X[11], SERCOM3/PAD[1], SERCOM5/PAD[1], TC4/WO[1], TCC0/WO[5], USB/SOF 1kHz, GCLK_IO[7]. Powered from VDDIO.
33	PA24	bidirectional	USB D- (USB/DM) by default. Alternate: EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC5/WO[0], TCC1/WO[2]. Enable pull-up in input GPIO mode if unused. Powered from VDDIO.
34	PA25	bidirectional	USB D+ (USB/DP) by default. Alternate: EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC5/WO[1], TCC1/WO[3]. Enable pull-up in input GPIO mode if unused. Powered from VDDIO.
35	GND	power_in	Digital ground return for the VDDIO and VDDCORE domains.
36	VDDIO	power_in	Digital I/O supply, 1.62-3.63 V. Powers the VDDIO-domain PORT pins. Must be decoupled locally.
37	PB22	bidirectional	Port B GPIO. Muxed: EXTINT[6], SERCOM5/PAD[2], TC7/WO[0], TCC3/WO[0], GCLK_IO[0]. Powered from VDDIO.
38	PB23	bidirectional	Port B GPIO. Muxed: EXTINT[7], SERCOM5/PAD[3], TC7/WO[1], TCC3/WO[1], GCLK_IO[1]. Powered from VDDIO.
39	PA27	bidirectional	Port A GPIO. Muxed: EXTINT[15], TCC3/WO[6], GCLK_IO[0]. Powered from VDDIO.
40	RESET	input	Active-low reset input. Internal pull-up; drive low to reset the device.
41	PA28	bidirectional	Port A GPIO. Muxed: EXTINT[8], TCC3/WO[7], GCLK_IO[0]. Powered from VDDIO.
42	VDDCORE	power_out	1.2 V internal regulator output for the core. Decouple externally (typically 1 uF ceramic to GND). Do not drive from an external source.
43	VDDIN	power_in	Main supply input to the on-chip voltage regulator, 1.62-3.63 V. Decouple locally; typically tied to VDDIO/VDDANA.
44	GND	power_in	Digital ground return for the regulator (VDDIN/VDDCORE) domain.
45	PA30	bidirectional	SWCLK (Serial Wire Debug clock) by default in the presence of a debugger. Alternate: EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4], GCLK_IO[0]. Powered from VDDIO.
46	PA31	bidirectional	SWDIO (Serial Wire Debug data I/O) - activated in the presence of a debugger. Alternate: EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1], TCC3/WO[5]. Powered from VDDIO.
47	PB02	bidirectional	Port B GPIO. Muxed: EXTINT[2], ADC AIN[10], PTC Y[8], SERCOM5/PAD[0], TC6/WO[0], TCC3/WO[2]. Powered from VDDANA.
48	PB03	bidirectional	Port B GPIO. Muxed: EXTINT[3], ADC AIN[11], PTC Y[9], SERCOM5/PAD[1], TC6/WO[1], TCC3/WO[3]. Powered from VDDANA.
EP	GND	power_in	Exposed thermal pad on the QFN package underside. Must be soldered to the PCB ground plane for thermal and electrical performance.

Key specifications

Parameter	Value
Manufacturer	Microchip
Package	QFN-48-EP(7x7)
Category	MCU
Pins	49

Ordering variants

ATSAMD21G18A-MU
ATSAMD21G18A-MUT
ATSAMD21G18A-MUAU
ATSAMD21G18A-MUAUT
ATSAMD21G18A-MUMZ
ATSAMD21G18A-MUMZT
ATSAMD21G18A-MUAZ
ATSAMD21G18A-MUAZT
ATSAMD21G18A-MUAF
ATSAMD21G18A-MUAFT
ATSAMD21G18A-MUMF
ATSAMD21G18A-MUMFT

CAD (KiCad official)

Symbol: ATSAMD21G18A-MU
Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
3D model: QFN-48-EP(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip datasheet (1115 pp, sha256 3aaa8a6575530d72, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF