AT316J-CuH-S from AOTE, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VIN+	input	Noninverting gate drive voltage output (VOUT) control input. TTL/CMOS compatible logic input referenced to GND1; VIH >= 2.0 V, VIL <= 0.8 V.
2	VIN-	input	Inverting gate drive voltage output (VOUT) control input. TTL/CMOS compatible logic input referenced to GND1; VIH >= 2.0 V, VIL <= 0.8 V.
3	VCC1	power_in	Positive input-side supply voltage (4.5 V to 5.5 V). Powers the input logic and LED driver referenced to GND1.
4	GND1	power_in	Input-side ground reference for VCC1, VIN+, VIN-, RESET and FAULT.
5	RESET	input	FAULT reset input (active low). A logic-low pulse of at least 0.1 us asynchronously resets the FAULT output high and re-enables VIN. RESET is not affected by UVLO; asserting RESET while VOUT is high does not affect VOUT.
6	FAULT	output	Open-collector FAULT output (active low). Transitions from high-impedance to logic low within 5 us when the DESAT pin voltage exceeds the internal 7 V reference. Remains low until RESET is asserted; can be wire-OR'd across multiple AT316J devices to form a single fault bus.
7	VLED1+	passive	Internal LED1 anode test point. Must be left unconnected for guaranteed datasheet performance (for optical coupling factory testing only).
8	VLED1-	passive	Internal LED1 cathode. This pin must be connected to input ground (GND1).
9	VEE	power_in	Negative output-side supply voltage (output IC ground/return). Sets the low-side gate drive rail for the IGBT off-state.
10	VEE	power_in	Negative output-side supply voltage (output IC ground/return). Tied internally with pin 9; both pins should be connected together externally.
11	VOUT	output	Gate drive voltage output to the IGBT/MOSFET gate. Provides up to +/-2.5 A peak output current; swings between VCC2 (high) and VEE (low).
12	VC	power_in	Positive output-side supply voltage input to the driver collector stage. Range VEE+6 V to VCC2 per recommended operating conditions.
13	VCC2	power_in	Positive output supply voltage. Total output supply (VCC2 - VEE) of 15 V to 30 V; feeds the high-side gate driver and UVLO monitor.
14	DESAT	input	Desaturation (VCE) voltage sense input. When the voltage on DESAT exceeds the internal 7 V reference while the IGBT is commanded on, FAULT changes from high impedance to logic low within 5 us, indicating IGBT desaturation/overcurrent.
15	VLED2+	passive	Internal LED2 anode test point. Must be left unconnected for guaranteed datasheet performance (for optical coupling factory testing only).
16	VE	power_in	Common (IGBT emitter) output-side supply voltage reference. The output-side ground/emitter reference used by DESAT, VC and gate return.

Key specifications

Parameter	Value
Manufacturer	AOTE
Package	SOP-16
Category	Optoisolators
Pins	16

Ordering variants

Same part, different packaging or reel option.

AT316J-CuH-S

CAD (KiCad official)

Symbol: AT316J-CuH-S
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: AOTE datasheet (42 pp, sha256 665d8c76ddb17ebe, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF