component
AT24C256CDRG
Public Unreviewedby Ray
HANSCHIP semiconductor EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownAT24C256CDRG
HANSCHIP semiconductor · EEPROM · SOP-8
AT24C256CDRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Device Address Input bit 0. Hard-wired to VCC or GND to set the least-significant bit of the I2C 7-bit slave address, allowing up to eight devices on the same bus. |
| 2 | E1 | input | Device Address Input bit 1. Hard-wired to VCC or GND to set an address bit of the I2C 7-bit slave address. |
| 3 | E2 | input | Device Address Input bit 2. Hard-wired to VCC or GND to set an address bit of the I2C 7-bit slave address. |
| 4 | GND | power_in | Ground reference for the power supply. Must be connected to system ground. |
| 5 | SDA | bidirectional | Serial Data. Open-drain bidirectional I2C data line used to serially transfer data to and from the device. Requires an external pull-up resistor to VCC. Includes Schmitt-trigger and spike suppression filtering. |
| 6 | SCL | input | Serial Clock. Master-driven clock input used to control the flow of data. Data on SDA is latched on the rising edge and clocked out on the falling edge of SCL. Supports 400 kHz and 1 MHz operation. |
| 7 | WP | input | Write Protect. When tied to VCC the entire memory array (and Identification Page) becomes read-only; when tied to GND or left floating, write operations are enabled. Driving WP high during a write causes data bytes not to be acknowledged. |
| 8 | VCC | power_in | Device Power Supply. Operating range 1.7 V to 5.5 V. Operations at invalid VCC voltages may produce spurious results and should not be attempted. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
AT24C256CDRGAT24C256CDRG4AT24C256CDRGCPGAT24C256CDRGCDGKRGAT24C256CDRGCPWRG
CAD (KiCad official)
- Symbol:
AT24C256CDRG - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
at24c256cdrg.step |
122 KB | You want the bare part, or you mark your own boards. |
at24c256cdrg-etched.step |
2.5 MB | You want the part with AT24C256CDRG already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 606 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (25 pp, sha256
15b5ab05a811009e, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).