component
APM32F103RBT6
Public Unreviewedby Ray
Geehy Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownAPM32F103RBT6
Geehy · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
APM32F103RBT6 from Geehy, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup battery supply, 1.8-3.6 V. Powers RTC, external 32 kHz oscillator, and backup registers when VDD is off. |
| 2 | PC13/TAMPER-RTC | bidirectional | GPIO PC13 with alternate TAMPER-RTC function. Powered from VBAT domain; weak drive (2 MHz, 30 pF max, cannot source current). |
| 3 | PC14/OSC32_IN | bidirectional | GPIO PC14 or 32.768 kHz LSE crystal input. Backup domain, weak drive. |
| 4 | PC15/OSC32_OUT | bidirectional | GPIO PC15 or 32.768 kHz LSE crystal output. Backup domain, weak drive. |
| 5 | OSC_IN/PD0 | input | HSE crystal oscillator input (4-16 MHz) by default after reset; can be remapped to GPIO PD0. |
| 6 | OSC_OUT/PD1 | output | HSE crystal oscillator output by default after reset; can be remapped to GPIO PD1. |
| 7 | NRST | bidirectional | Active-low bidirectional reset pin. Internal pull-up; drives low during internal reset events. |
| 8 | PC0 | bidirectional | GPIO PC0; alt: ADC12_IN10. |
| 9 | PC1 | bidirectional | GPIO PC1; alt: ADC12_IN11. |
| 10 | PC2 | bidirectional | GPIO PC2; alt: ADC12_IN12. |
| 11 | PC3 | bidirectional | GPIO PC3; alt: ADC12_IN13. |
| 12 | VSSA | power_in | Analog ground return for ADC, reset block, RC oscillator, and PLL analog section. Must connect to VSS. |
| 13 | VDDA | power_in | Analog supply, 2.4-3.6 V (must be ≥2.4 V when ADC is used). Must connect to VDD. |
| 14 | PA0/WKUP | bidirectional | GPIO PA0; alt: WKUP, USART2_CTS, ADC12_IN0, TMR2_CH1_ETR. |
| 15 | PA1 | bidirectional | GPIO PA1; alt: USART2_RTS, ADC12_IN1, TMR2_CH2. |
| 16 | PA2 | bidirectional | GPIO PA2; alt: USART2_TX, ADC12_IN2, TMR2_CH3. |
| 17 | PA3 | bidirectional | GPIO PA3; alt: USART2_RX, ADC12_IN3, TMR2_CH4. |
| 18 | VSS_4 | power_in | Digital ground. |
| 19 | VDD_4 | power_in | Digital supply, 2.0-3.6 V. |
| 20 | PA4 | bidirectional | GPIO PA4; alt: SPI1_NSS, USART2_CK, ADC12_IN4. |
| 21 | PA5 | bidirectional | GPIO PA5; alt: SPI1_SCK, ADC12_IN5. |
| 22 | PA6 | bidirectional | GPIO PA6; alt: SPI1_MISO, ADC12_IN6, TMR3_CH1, TMR1_BKIN (remap). |
| 23 | PA7 | bidirectional | GPIO PA7; alt: SPI1_MOSI, ADC12_IN7, TMR3_CH2, TMR1_CH1N (remap). |
| 24 | PC4 | bidirectional | GPIO PC4; alt: ADC12_IN14. |
| 25 | PC5 | bidirectional | GPIO PC5; alt: ADC12_IN15. |
| 26 | PB0 | bidirectional | GPIO PB0; alt: ADC12_IN8, TMR3_CH3, TMR1_CH2N (remap). |
| 27 | PB1 | bidirectional | GPIO PB1; alt: ADC12_IN9, TMR3_CH4, TMR1_CH3N (remap). |
| 28 | PB2/BOOT1 | bidirectional | GPIO PB2 or boot-mode select BOOT1 input (5 V tolerant). |
| 29 | PB10 | bidirectional | GPIO PB10 (FT); alt: I2C2_SCL, I2C4_SCL, USART3_TX, TMR2_CH3 (remap). |
| 30 | PB11 | bidirectional | GPIO PB11 (FT); alt: I2C2_SDA, I2C4_SDA, USART3_RX, TMR2_CH4 (remap). |
| 31 | VSS_1 | power_in | Digital ground. |
| 32 | VDD_1 | power_in | Digital supply, 2.0-3.6 V. |
| 33 | PB12 | bidirectional | GPIO PB12 (FT); alt: SPI2_NSS, I2C2_SMBAI, USART3_CK, TMR1_BKIN. |
| 34 | PB13 | bidirectional | GPIO PB13 (FT); alt: SPI2_SCK, USART3_CTS, TMR1_CH1N, QSPI_IO0. |
| 35 | PB14 | bidirectional | GPIO PB14 (FT); alt: SPI2_MISO, USART3_RTS, TMR1_CH2N, QSPI_IO1. |
| 36 | PB15 | bidirectional | GPIO PB15 (FT); alt: SPI2_MOSI, TMR1_CH3N, QSPI_IO2. |
| 37 | PC6 | bidirectional | GPIO PC6 (FT); alt: TMR3_CH1 (remap). |
| 38 | PC7 | bidirectional | GPIO PC7 (FT); alt: TMR3_CH2 (remap). |
| 39 | PC8 | bidirectional | GPIO PC8 (FT); alt: TMR3_CH3 (remap). |
| 40 | PC9 | bidirectional | GPIO PC9 (FT); alt: TMR3_CH4 (remap). |
| 41 | PA8 | bidirectional | GPIO PA8 (FT); alt: USART1_CK, TMR1_CH1, MCO. |
| 42 | PA9 | bidirectional | GPIO PA9 (FT); alt: USART1_TX, TMR1_CH2. |
| 43 | PA10 | bidirectional | GPIO PA10 (FT); alt: USART1_RX, TMR1_CH3. |
| 44 | PA11 | bidirectional | GPIO PA11 (FT); alt: USART1_CTS, USBD1_DM, USBD2_DM, CAN_RX, TMR1_CH4. |
| 45 | PA12 | bidirectional | GPIO PA12 (FT); alt: USART1_RTS, USBD1_DP, USBD2_DP, CAN_TX, TMR1_ETR. |
| 46 | PA13/JTMS/SWDIO | bidirectional | JTAG TMS / SWD IO after reset; can be released to GPIO PA13 (FT). |
| 47 | VSS_2 | power_in | Digital ground. |
| 48 | VDD_2 | power_in | Digital supply, 2.0-3.6 V. |
| 49 | PA14/JTCK/SWCLK | bidirectional | JTAG TCK / SWD CLK after reset; can be released to GPIO PA14 (FT). |
| 50 | PA15/JTDI | bidirectional | JTAG TDI after reset; alt: TMR2_CH1_ETR (remap), SPI1_NSS (remap); usable as GPIO PA15 when JTAG released. |
| 51 | PC10 | bidirectional | GPIO PC10 (FT); alt: USART3_TX (remap). |
| 52 | PC11 | bidirectional | GPIO PC11 (FT); alt: USART3_RX (remap). |
| 53 | PC12 | bidirectional | GPIO PC12 (FT); alt: USART3_CK (remap). |
| 54 | PD2 | bidirectional | GPIO PD2 (FT); alt: TMR3_ETR. |
| 55 | PB3/JTDO | bidirectional | JTAG TDO after reset; alt: TRACESWO, TMR2_CH2, SPI1_SCK; usable as GPIO PB3 (FT) when JTAG released. |
| 56 | PB4/NJTRST | bidirectional | JTAG NJTRST after reset; alt: TMR3_CH1 (remap), SPI1_MISO (remap); usable as GPIO PB4 (FT) when JTAG released. |
| 57 | PB5 | bidirectional | GPIO PB5 (not 5V tolerant); alt: I2C1_SMBAI, TMR3_CH2 (remap), SPI1_MOSI (remap). |
| 58 | PB6 | bidirectional | GPIO PB6 (FT); alt: I2C1_SCL, I2C3_SCL, TMR4_CH1, USART1_TX (remap). |
| 59 | PB7 | bidirectional | GPIO PB7 (FT); alt: I2C1_SDA, I2C3_SDA, TMR4_CH2, USART1_RX (remap). |
| 60 | BOOT0 | input | Boot-mode select input sampled at reset; picks boot source (user flash, system memory, or SRAM) together with BOOT1. |
| 61 | PB8 | bidirectional | GPIO PB8 (FT); alt: TMR4_CH3, I2C1_SCL (remap), I2C3_SCL (remap), CAN_RX (remap). |
| 62 | PB9 | bidirectional | GPIO PB9 (FT); alt: TMR4_CH4, I2C1_SDA (remap), I2C3_SDA (remap), CAN_TX (remap). |
| 63 | VSS_3 | power_in | Digital ground. |
| 64 | VDD_3 | power_in | Digital supply, 2.0-3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Geehy |
| Package | LQFP-64(10x10) |
| Category | MCU |
| Pins | 64 |
Ordering variants
APM32F103RBT6APM32F103RBT6-RAPM32F103RBT6APM32F103RBT7APM32F103RBT6APM32F103RBT7-RAPM32F103RBT6APM32F103VBT6APM32F103RBT6APM32F103VBT7APM32F103RBT6APM32F103CBT6APM32F103RBT6APM32F103CBT6-RAPM32F103RBT6APM32F103CBT7APM32F103RBT6APM32F103CBT7-RAPM32F103RBT6APM32F103TBU6APM32F103RBT6APM32F103TBU6-RAPM32F103RBT6APM32F103TBU7APM32F103RBT6APM32F103TBU7-R
CAD (KiCad official)
- Symbol:
APM32F103RBT6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
apm32f103rbt6.step |
847 KB | You want the bare part, or you mark your own boards. |
apm32f103rbt6-etched.step |
5.6 MB | You want the part with APM32F103RBT6 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1406 faces against 995 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Geehy datasheet (85 pp, sha256
8c9a2ab3889a585a, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).