AP64500SP-13 from Diodes Incorporated, in a SO-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BST	passive	High-Side Gate Drive Boost Input. BST supplies the drive for the high-side n-channel power MOSFET. A 100nF capacitor is recommended from BST to SW to power the high-side driver. Absolute max VBST = VSW - 0.3 to VSW + 6.0V.
2	VIN	power_in	Power Input. VIN supplies the power to the IC as well as the step-down converter power MOSFETs. Drive VIN with a 3.8V to 40V power source. Bypass VIN to GND with a suitably large capacitor to eliminate switching noise. Absolute max 42V DC.
3	EN	input	Enable Input. Digital input that turns the regulator on or off. Drive EN high to turn on and low to turn off. Connect to VIN or leave floating for automatic startup. Precision threshold of 1.18V for programming the UVLO.
4	RT/CLK	bidirectional	Resistor Timing and External Clock. Connect a resistor from RT/CLK to GND to set the internal oscillator frequency, or drive with an external clock (100kHz to 2.2MHz) to synchronize the internal oscillator via a PLL. If external clock edges stop, operation returns to resistor-based frequency programming.
5	FB	input	Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. Internal reference is 0.8V ±1%.
6	COMP	passive	Compensation. Connect an external RC network to COMP to adjust the loop response of the internal error amplifier. See External Loop Compensation Design section for details.
7	GND	power_in	Power Ground. Return for internal circuitry and power stage.
8	SW	power_out	Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Absolute max -0.3 to VIN+0.3V (DC).
9	EXPOSED PAD	power_in	Heat dissipation path of the die. The exposed thermal pad must be electrically connected to GND and must be connected to the ground plane of the PCB for proper operation and optimized thermal performance.

Key specifications

Parameter	Value
Manufacturer	Diodes Incorporated
Package	SO-8-EP
Category	PMIC
Pins	9

Ordering variants

AP64500SP-13

CAD (KiCad official)

Symbol: AP64500SP-13
Footprint: Package_SO:Diodes_SO-8EP
3D model: SO-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`ap64500sp-13.step`	194 KB	You want the bare part, or you mark your own boards.
`ap64500sp-13-etched.step`	2.3 MB	You want the part with `AP64500SP-13` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 560 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Diodes Incorporated datasheet (26 pp, sha256 d3bcdc7dd4ca44cb, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF