AP2120N-3.3TRG1 from Diodes, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground reference for the regulator. Tie directly to the system ground plane; quiescent current (~25µA) returns through this pin.
2	VOUT	power_out	Regulated 3.3V output (±2% accuracy). Sources up to 150mA continuous (250mA current-limited). Requires a ≥1µF ceramic output capacitor with ESR between 0.01Ω and 100Ω for stability.
3	VIN	power_in	Unregulated input voltage supply, 2V to 6V recommended operating range (6.5V absolute max). Requires a 1µF ceramic input capacitor. For 3.3V output, VIN should be ≥ 3.5V to stay out of dropout at rated load.

Key specifications

Parameter	Value
Manufacturer	Diodes
Package	SOT-23
Category	PMIC
Pins	3

Ordering variants

AP2120N-3.3TRG1

CAD (KiCad official)

Symbol: AP2120N-3.3TRG1
Footprint: Package_TO_SOT_SMD:SOT-23
3D model: SOT-23 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`ap2120n-3-3trg1.step`	59 KB	You want the bare part, or you mark your own boards.
`ap2120n-3-3trg1-etched.step`	2.4 MB	You want the part with `AP2120N-3.3TRG1` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 581 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Diodes datasheet (19 pp, sha256 66be4c8fbb47afd5, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF