component
aip8563sa8-tr
Public Unreviewedby Ray
Wuxi I core Elec AIP8563SA8 TR Real-time Clocks (RTC), SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
README
markdownAIP8563SA8.TR
Wuxi I core Elec AIP8563SA8 TR · Real-time Clocks (RTC) · SOP-8
AIP8563SA8.TR from Wuxi I core Elec AIP8563SA8 TR, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OSCI | input | 32.768 kHz crystal oscillator input. Connect to one terminal of a 32.768 kHz quartz crystal; internal oscillator capacitors are integrated but an external trim cap (5-25 pF) may be used for frequency adjustment. Absolute-max input voltage -0.5 V to VDD+0.5 V. |
| 2 | OSCO | output | 32.768 kHz crystal oscillator output. Connect to the other terminal of the 32.768 kHz quartz crystal. Do not load externally beyond the crystal network. |
| 3 | /INT | output | Interrupt output, active LOW, open-drain. Asserted by the alarm flag (AF) and/or timer flag (TF) per the AIE/TIE and TI/TP settings in control/status register 2. Requires an external pull-up resistor to V1/VDD; leave floating or tie to VDD via pull-up if unused. |
| 4 | VSS | power_in | Ground / negative supply reference (0 V). |
| 5 | SDA | bidirectional | I2C serial data I/O (open-drain). Requires an external pull-up resistor (R = tr/Cb) to V1/VDD. Supports up to 400 kHz bus rate over VDD = 1.8-5.5 V; VIL ≤ 0.3·VDD, VIH ≥ 0.7·VDD. |
| 6 | SCL | input | I2C serial clock input (open-drain, requires external pull-up to V1/VDD). Max clock frequency 400 kHz; VIL ≤ 0.3·VDD, VIH ≥ 0.7·VDD. In EXT_CLK test mode the SCL role is separate from CLKOUT which becomes the test-clock input. |
| 7 | CLKOUT | output | Programmable clock output (open-drain). Selectable frequency 32.768 kHz (default), 1024 Hz, 32 Hz, or 1 Hz via the CLKOUT frequency register (0Dh). High-impedance when FE=0. In EXT_CLK test mode (TEST1=1) this pin becomes an input for an external 64 Hz test clock. |
| 8 | VDD | power_in | Positive supply. Operating range 1.8 V to 5.5 V for I2C-active operation (down to ~1.0 V for data retention with I2C inactive). Absolute max 6.5 V. Typical sleep current 0.25 uA at VDD=3.0 V, Tamb=25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec AIP8563SA8 TR |
| Package | SOP-8 |
| Category | RTC |
| Pins | 8 |
Ordering variants
AIP8563SA8.TRAIP8563SA8.TRSA8.TBAIP8563SA8.TRDA8.TBAIP8563SA8.TRTA8.TRAIP8563SA8.TRMA8.TRAIP8563SA8.TRMA8.TB
CAD (KiCad official)
- Symbol:
AIP8563SA8.TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec AIP8563SA8 TR datasheet (None pp, sha256
0f0c54d944398d78, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).