AiP74HCT244TA20.TR from Wuxi I core Elec AiP74HCT244TA20 TR, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OE	input	Output enable for group 1 (1Y0..1Y3), active low. High level tri-states the group-1 outputs.
2	1A0	input	Data input, channel 1 bit 0. Buffered to 1Y0 when 1OE is low.
3	2Y0	tri_state	Bus output, channel 2 bit 0. Follows 2A0 when 2OE is low; high-Z when 2OE is high.
4	1A1	input	Data input, channel 1 bit 1. Buffered to 1Y1 when 1OE is low.
5	2Y1	tri_state	Bus output, channel 2 bit 1. Follows 2A1 when 2OE is low; high-Z when 2OE is high.
6	1A2	input	Data input, channel 1 bit 2. Buffered to 1Y2 when 1OE is low.
7	2Y2	tri_state	Bus output, channel 2 bit 2. Follows 2A2 when 2OE is low; high-Z when 2OE is high.
8	1A3	input	Data input, channel 1 bit 3. Buffered to 1Y3 when 1OE is low.
9	2Y3	tri_state	Bus output, channel 2 bit 3. Follows 2A3 when 2OE is low; high-Z when 2OE is high.
10	GND	power_in	Ground reference, 0 V.
11	2A3	input	Data input, channel 2 bit 3. Buffered to 2Y3 when 2OE is low.
12	1Y3	tri_state	Bus output, channel 1 bit 3. Follows 1A3 when 1OE is low; high-Z when 1OE is high.
13	2A2	input	Data input, channel 2 bit 2. Buffered to 2Y2 when 2OE is low.
14	1Y2	tri_state	Bus output, channel 1 bit 2. Follows 1A2 when 1OE is low; high-Z when 1OE is high.
15	2A1	input	Data input, channel 2 bit 1. Buffered to 2Y1 when 2OE is low.
16	1Y1	tri_state	Bus output, channel 1 bit 1. Follows 1A1 when 1OE is low; high-Z when 1OE is high.
17	2A0	input	Data input, channel 2 bit 0. Buffered to 2Y0 when 2OE is low.
18	1Y0	tri_state	Bus output, channel 1 bit 0. Follows 1A0 when 1OE is low; high-Z when 1OE is high.
19	2OE	input	Output enable for group 2 (2Y0..2Y3), active low. High level tri-states the group-2 outputs.
20	VCC	power_in	Supply voltage. Recommended 4.5-5.5 V for HCT variant (2.0-6.0 V for HC); absolute max 7.0 V.

Key specifications

Parameter	Value
Manufacturer	Wuxi I core Elec AiP74HCT244TA20 TR
Package	TSSOP-20
Category	Logic
Pins	20

Ordering variants

AiP74HCT244TA20.TR
AiP74HCT244TA20.TRTA20.TB
AiP74HCT244TA20.TRSA20.TR
AiP74HCT244TA20.TRSA20.TB
AiP74HCT244TA20.TRDA20.TB

CAD (KiCad official)

Symbol: AiP74HCT244TA20.TR
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`aip74hct244ta20-tr.step`	267 KB	You want the bare part, or you mark your own boards.
`aip74hct244ta20-tr-etched.step`	3.2 MB	You want the part with `AiP74HCT244TA20.TR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 851 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Wuxi I core Elec AiP74HCT244TA20 TR datasheet (18 pp, sha256 36eef0eb359fbb5f, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF