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ACS725LLCTR-10AU-T
Public Unreviewedby Ray
Allegro MicroSystems LLC Current Sensors, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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markdownACS725LLCTR-10AU-T
Allegro MicroSystems LLC · Current Sensors · SOIC-8
ACS725LLCTR-10AU-T from Allegro MicroSystems LLC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Primary current sense terminal (positive side). Tied to pin 2 internally; both pins carry the sensed current entering the internal copper conduction path (1.2 mΩ typ). Galvanically isolated from the signal-side pins. |
| 2 | IP+ | passive | Primary current sense terminal (positive side). Tied to pin 1 internally as part of the internal copper conduction path used for current sensing. |
| 3 | IP- | passive | Primary current sense terminal (negative side / return). Tied to pin 4 internally; both pins form the current-out leg of the internal 1.2 mΩ copper conduction path. Galvanically isolated from the signal-side pins. |
| 4 | IP- | passive | Primary current sense terminal (negative side / return). Tied to pin 3 internally as part of the internal copper conduction path used for current sensing. |
| 5 | GND | power_in | Signal-ground terminal. Reference for VCC, VIOUT, and FILTER on the electrically isolated signal side of the device. |
| 6 | FILTER | passive | External bandwidth-setting capacitor pin. A user-selected capacitor (e.g. 1 nF, referenced to GND) sets the low-pass corner of the output amplifier, trading response speed for reduced noise. |
| 7 | VIOUT | output | Analog output voltage. Ratiometric to VCC, biased at VCC/2 quiescent, and swings proportionally with the bidirectional primary current IP (sensitivity is variant-dependent, e.g. 264 mV/A at VCC = 3.3 V for the 10AU variant). |
| 8 | VCC | power_in | Device power-supply terminal. Nominal 3.3 V single-supply operation (absolute max 6 V). Bypass locally with a 0.1 µF ceramic capacitor to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems LLC |
| Package | SOIC-8 |
| Category | Sensor |
| Pins | 8 |
Ordering variants
ACS725LLCTR-10AU-TACS725LLCTR-10AU-TACS725LLCTR-10AU-S
CAD (KiCad official)
- Symbol:
ACS725LLCTR-10AU-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Allegro MicroSystems LLC datasheet (20 pp, sha256
8d8dc74eb087bf95, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).