component
74LVX4245MTCX
Public Unreviewedby Ray
onsemi Buffer/Driver/Transceiver, TSSOP-24. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdown74LVX4245MTCX
onsemi · Buffer/Driver/Transceiver · TSSOP-24
74LVX4245MTCX from onsemi, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCCA | power_in | A-side supply voltage, 4.5V to 5.5V. Powers the 5V A-port I/O and the control logic; must be powered up before VCCB. |
| 2 | T/R | input | Transmit/Receive direction control input, referenced to VCCA. HIGH = A-to-B (transmit); LOW = B-to-A (receive). TTL-compatible. |
| 3 | A0 | bidirectional | A-side bit 0. 5V bus I/O; sources/sinks 24 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 4 | A1 | bidirectional | A-side bit 1. 5V bus I/O; sources/sinks 24 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 5 | A2 | bidirectional | A-side bit 2. 5V bus I/O; sources/sinks 24 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 6 | A3 | bidirectional | A-side bit 3. 5V bus I/O; sources/sinks 24 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 7 | A4 | bidirectional | A-side bit 4. 5V bus I/O; sources/sinks 24 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 8 | A5 | bidirectional | A-side bit 5. 5V bus I/O; sources/sinks 24 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 9 | A6 | bidirectional | A-side bit 6. 5V bus I/O; sources/sinks 24 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 10 | A7 | bidirectional | A-side bit 7. 5V bus I/O; sources/sinks 24 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 11 | GND | power_in | Ground reference for both A- and B-side circuitry. Tie to system ground; both GND pins (11 and 12) must be connected. |
| 12 | GND | power_in | Ground reference for both A- and B-side circuitry. Tie to system ground; both GND pins (11 and 12) must be connected. |
| 13 | GND | power_in | Ground reference for both A- and B-side circuitry. Tie to system ground; both GND pins (13 and 14) must be connected. |
| 14 | GND | power_in | Ground reference for both A- and B-side circuitry. Tie to system ground; both GND pins (13 and 14) must be connected. |
| 15 | B7 | bidirectional | B-side bit 7. 3V bus I/O; sources/sinks 12 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 16 | B6 | bidirectional | B-side bit 6. 3V bus I/O; sources/sinks 12 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 17 | B5 | bidirectional | B-side bit 5. 3V bus I/O; sources/sinks 12 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 18 | B4 | bidirectional | B-side bit 4. 3V bus I/O; sources/sinks 12 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 19 | B3 | bidirectional | B-side bit 3. 3V bus I/O; sources/sinks 12 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 20 | B2 | bidirectional | B-side bit 2. 3V bus I/O; sources/sinks 12 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 21 | B1 | bidirectional | B-side bit 1. 3V bus I/O; sources/sinks 12 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 22 | B0 | bidirectional | B-side bit 0. 3V bus I/O; sources/sinks 12 mA. Tri-stated when OE is HIGH; direction set by T/R. |
| 23 | OE | input | Active-LOW Output Enable. When HIGH, both A and B ports are placed in HIGH-Z (3-STATE). TTL-compatible; should ramp with or ahead of VCCA at power-up to prevent bus contention. |
| 24 | VCCB | power_in | B-side supply voltage, 2.7V to 3.6V. Powers the 3V B-port I/O; power up after VCCA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-24 |
| Category | Logic |
| Pins | 24 |
Ordering variants
74LVX4245MTCX74LVX4245MTCXWM74LVX4245MTCXWMX74LVX4245MTCXQSC74LVX4245MTCXQSCX
CAD (KiCad official)
- Symbol:
74LVX4245MTCX - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
74lvx4245mtcx.step |
315 KB | You want the bare part, or you mark your own boards. |
74lvx4245mtcx-etched.step |
2.7 MB | You want the part with 74LVX4245MTCX already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 717 faces against 387 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (8 pp, sha256
763a22477bfe4497, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).