74LVC1G00M5 from HGSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	A	input	NAND gate input A. CMOS logic input; VIH >= 0.7VCC (VCC=3-5.5 V) or 0.65VCC (VCC=1.65-1.95 V). Input leakage typ 0.01 uA (max +/-5 uA).
2	B	input	NAND gate input B. CMOS logic input with the same thresholds as pin A. Input leakage typ 0.01 uA (max +/-5 uA).
3	GND	power_in	Ground / negative supply reference (0 V).
4	Y	output	NAND gate output: Y = NOT(A AND B). Push-pull CMOS output rated up to +/-32 mA at VCC=4.5 V (+/-16 mA at 3 V, +/-8 mA at 2.3 V, +/-4 mA at 1.65 V); tPHL/tPLH ~10 ns typ at CL=15 pF, VCC=5 V.
5	VCC	power_in	Positive supply, 1.65 V to 5.5 V operating (6.5 V absolute max). Quiescent ICC typ 0.01 uA (max 10 uA). Decouple with a local bypass capacitor to GND.

Key specifications

Parameter	Value
Manufacturer	HGSEMI
Package	SOT-23-5
Category	Logic
Pins	5

Ordering variants

Same part, different packaging or reel option.

74LVC1G00M5
74LVC1G00M5/TR
74LVC1G00M5M7
74LVC1G00M5M7/TR

CAD (KiCad official)

Symbol: 74LVC1G00M5
Footprint: Package_TO_SOT_SMD:SOT-23-5
3D model: SOT-23-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HGSEMI datasheet (7 pp, sha256 ad439cb07c142fe5, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF