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74LVC1G00M5

Public Made by Adom

by adom

HGSEMI Gates, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentlogic74lvc1g00m5
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs 74lvc1g00m5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers 74lvc1g00m5: viewers · Ray 2mo ago
74lvc1g00m5-etched.fit.json 74lvc1g00m5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc1g00m5-etched.glb 74lvc1g00m5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc1g00m5-etched.step 74lvc1g00m5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc1g00m5.glb Publish 0.1.0 · Ray 2mo ago
74lvc1g00m5.kicad_mod Publish 0.1.0 · Ray 2mo ago
74lvc1g00m5.kicad_sym Publish 0.1.0 · Ray 2mo ago
74lvc1g00m5.lbr Publish 0.1.0 · Ray 2mo ago
74lvc1g00m5.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.1.0 · Ray 2mo ago
page.json 74lvc1g00m5: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md 74lvc1g00m5: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

74LVC1G00M5

HGSEMI · Gates · SOT-23-5

74LVC1G00M5 from HGSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input NAND gate input A. CMOS logic input; VIH >= 0.7VCC (VCC=3-5.5 V) or 0.65VCC (VCC=1.65-1.95 V). Input leakage typ 0.01 uA (max +/-5 uA).
2 B input NAND gate input B. CMOS logic input with the same thresholds as pin A. Input leakage typ 0.01 uA (max +/-5 uA).
3 GND power_in Ground / negative supply reference (0 V).
4 Y output NAND gate output: Y = NOT(A AND B). Push-pull CMOS output rated up to +/-32 mA at VCC=4.5 V (+/-16 mA at 3 V, +/-8 mA at 2.3 V, +/-4 mA at 1.65 V); tPHL/tPLH ~10 ns typ at CL=15 pF, VCC=5 V.
5 VCC power_in Positive supply, 1.65 V to 5.5 V operating (6.5 V absolute max). Quiescent ICC typ 0.01 uA (max 10 uA). Decouple with a local bypass capacitor to GND.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOT-23-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • 74LVC1G00M5
  • 74LVC1G00M5/TR
  • 74LVC1G00M5M7
  • 74LVC1G00M5M7/TR

CAD (KiCad official)

  • Symbol: 74LVC1G00M5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: 74lvc1g00m5-etched.step / 74lvc1g00m5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc1g00m5.step / 74lvc1g00m5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (7 pp, sha256 ad439cb07c142fe5, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF