component
74HCT74PW-Q100
Public Made by Adomby adom
Nexperia Flip Flops, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdown74HCT74PW-Q100
Nexperia · Flip Flops · TSSOP-14
74HCT74PW-Q100 from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1RD | input | Flip-flop 1 asynchronous reset-direct input, active LOW. Drives 1Q LOW / 1Q_bar HIGH independent of clock. TTL input threshold; VIL max 0.8 V, VIH min 2.0 V at VCC = 4.5 V to 5.5 V. |
| 2 | 1D | input | Flip-flop 1 data input. Sampled on the LOW-to-HIGH edge of 1CP and transferred to 1Q. TTL input levels (VIL max 0.8 V, VIH min 2.0 V). |
| 3 | 1CP | input | Flip-flop 1 clock input, positive edge-triggered (LOW-to-HIGH). Schmitt-trigger action tolerates slow rise/fall times. TTL input levels. |
| 4 | 1SD | input | Flip-flop 1 asynchronous set-direct input, active LOW. Drives 1Q HIGH / 1Q_bar LOW independent of clock. TTL input levels. |
| 5 | 1Q | output | Flip-flop 1 true output. CMOS push-pull output; VOH min 3.7 V at IO = -4 mA, VOL max 0.4 V at IO = 4 mA (VCC = 4.5 V, -40 °C to +125 °C). Symmetrical output impedance. |
| 6 | 1Q_bar | output | Flip-flop 1 complement output (inverted 1Q). Same drive characteristics as 1Q: VOH min 3.7 V at IO = -4 mA, VOL max 0.4 V at IO = 4 mA (VCC = 4.5 V). |
| 7 | GND | power_in | Ground reference, 0 V. Maximum sink current 100 mA (IGND limiting value). |
| 8 | 2Q_bar | output | Flip-flop 2 complement output (inverted 2Q). CMOS push-pull; VOH min 3.7 V at IO = -4 mA, VOL max 0.4 V at IO = 4 mA (VCC = 4.5 V). |
| 9 | 2Q | output | Flip-flop 2 true output. CMOS push-pull; VOH min 3.7 V at IO = -4 mA, VOL max 0.4 V at IO = 4 mA (VCC = 4.5 V). Symmetrical output impedance. |
| 10 | 2SD | input | Flip-flop 2 asynchronous set-direct input, active LOW. Drives 2Q HIGH / 2Q_bar LOW independent of clock. TTL input levels. |
| 11 | 2CP | input | Flip-flop 2 clock input, positive edge-triggered (LOW-to-HIGH). Schmitt-trigger action tolerates slow rise/fall times. TTL input levels. |
| 12 | 2D | input | Flip-flop 2 data input. Sampled on the LOW-to-HIGH edge of 2CP and transferred to 2Q. TTL input levels. |
| 13 | 2RD | input | Flip-flop 2 asynchronous reset-direct input, active LOW. Drives 2Q LOW / 2Q_bar HIGH independent of clock. TTL input levels. |
| 14 | VCC | power_in | Supply voltage. Recommended 4.5 V to 5.5 V for 74HCT74-Q100; absolute maximum -0.5 V to +7 V. ICC max 80 μA at VCC = 5.5 V, TA up to +125 °C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
74HC74PW-Q10074HCT74PW-Q10074HC74D-Q10074HCT74D-Q10074HC74BQ-Q10074HCT74BQ-Q100
CAD (KiCad official)
- Symbol:
74HCT74PW-Q100 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hct74pw-q100-etched.step/74hct74pw-q100-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hct74pw-q100.step/74hct74pw-q100.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (18 pp, sha256
5b865b51d6a373a9, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).