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74hct541pw

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by Ray

Nexperia Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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74HCT541PW

Nexperia · Buffer/Driver/Transceiver · TSSOP-20

74HCT541PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output enable input 1 (active LOW). When OE1 is LOW AND OE2 is LOW, the eight Y outputs follow the A inputs; when OE1 is HIGH the outputs are forced to a high-impedance (Z) OFF-state.
2 A0 input Data input, channel 0. TTL-compatible logic input (74HCT), typical VIH ≥ 2.0 V, VIL ≤ 0.8 V at VCC = 4.5 V to 5.5 V. Drives buffer output Y0 when both output enables are asserted (LOW).
3 A1 input Data input, channel 1. TTL-compatible logic input driving buffer output Y1 when both OE1 and OE2 are LOW.
4 A2 input Data input, channel 2. TTL-compatible logic input driving buffer output Y2 when both OE1 and OE2 are LOW.
5 A3 input Data input, channel 3. TTL-compatible logic input driving buffer output Y3 when both OE1 and OE2 are LOW.
6 A4 input Data input, channel 4. TTL-compatible logic input driving buffer output Y4 when both OE1 and OE2 are LOW.
7 A5 input Data input, channel 5. TTL-compatible logic input driving buffer output Y5 when both OE1 and OE2 are LOW.
8 A6 input Data input, channel 6. TTL-compatible logic input driving buffer output Y6 when both OE1 and OE2 are LOW.
9 A7 input Data input, channel 7. TTL-compatible logic input driving buffer output Y7 when both OE1 and OE2 are LOW.
10 GND power_in Ground reference (0 V). All voltages in the datasheet are referenced to this pin. Absolute maximum IGND is -70 mA.
11 Y7 tri_state 3-state buffered data output, channel 7. Drives HIGH/LOW to follow A7 when OE1 = OE2 = LOW; enters high-impedance OFF-state when either OE is HIGH. Rated IO up to ±6.0 mA at VCC = 4.5 V (VOH ≥ 3.98 V, VOL ≤ 0.26 V typ).
12 Y6 tri_state 3-state buffered data output, channel 6. Follows A6 when both output enables are LOW; high-impedance when either OE is HIGH.
13 Y5 tri_state 3-state buffered data output, channel 5. Follows A5 when both output enables are LOW; high-impedance when either OE is HIGH.
14 Y4 tri_state 3-state buffered data output, channel 4. Follows A4 when both output enables are LOW; high-impedance when either OE is HIGH.
15 Y3 tri_state 3-state buffered data output, channel 3. Follows A3 when both output enables are LOW; high-impedance when either OE is HIGH.
16 Y2 tri_state 3-state buffered data output, channel 2. Follows A2 when both output enables are LOW; high-impedance when either OE is HIGH.
17 Y1 tri_state 3-state buffered data output, channel 1. Follows A1 when both output enables are LOW; high-impedance when either OE is HIGH.
18 Y0 tri_state 3-state buffered data output, channel 0. Follows A0 when both output enables are LOW; high-impedance when either OE is HIGH.
19 OE2 input Output enable input 2 (active LOW). Both OE1 and OE2 must be LOW to enable the Y outputs; a HIGH on either OE forces all outputs to a high-impedance state.
20 VCC power_in Supply voltage. Recommended operating range 4.5 V to 5.5 V for 74HCT541 (TTL-compatible variant); absolute maximum -0.5 V to +7 V. Bypass to GND with a local ceramic capacitor near the pin.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-20
Category Logic
Pins 20

Ordering variants

  • 74HCT541PW
  • 74HCT541PWD

CAD (KiCad official)

  • Symbol: 74HCT541PW
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (None pp, sha256 1365fecc10aa88a3, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

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