component
74hct10pw
Public Unreviewedby Ray
Nexperia Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdown74HCT10PW
Nexperia · Gates · TSSOP-14
74HCT10PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 data input A. TTL-level input (VIH >= 2.0 V at VCC = 4.5 V-5.5 V). Clamp diodes protect against overvoltage when current-limited to +/-20 mA. |
| 2 | 1B | input | Gate 1 data input B. TTL-level input; participates in the 1A AND 1B AND 1C NAND function driving output 1Y. |
| 3 | 2A | input | Gate 2 data input A. TTL-level input; participates in the 2A AND 2B AND 2C NAND function driving output 2Y. |
| 4 | 2B | input | Gate 2 data input B. TTL-level input feeding the second NAND gate. |
| 5 | 2C | input | Gate 2 data input C. TTL-level input feeding the second NAND gate. |
| 6 | 2Y | output | Gate 2 NAND output. LOW only when 2A, 2B, and 2C are all HIGH; otherwise HIGH. Rated for +/-25 mA continuous output current. |
| 7 | GND | power_in | Ground reference (0 V). All input/output voltages are referenced to this pin. |
| 8 | 3Y | output | Gate 3 NAND output. LOW only when 3A, 3B, and 3C are all HIGH; otherwise HIGH. |
| 9 | 3A | input | Gate 3 data input A. TTL-level input feeding the third NAND gate. |
| 10 | 3B | input | Gate 3 data input B. TTL-level input feeding the third NAND gate. |
| 11 | 3C | input | Gate 3 data input C. TTL-level input feeding the third NAND gate. |
| 12 | 1Y | output | Gate 1 NAND output. LOW only when 1A, 1B, and 1C are all HIGH; otherwise HIGH. |
| 13 | 1C | input | Gate 1 data input C. TTL-level input feeding the first NAND gate. |
| 14 | VCC | power_in | Positive supply voltage. Recommended operating range 4.5 V to 5.5 V for the 74HCT variant; absolute maximum -0.5 V to +7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
74HCT10PW74HCT10PWD
CAD (KiCad official)
- Symbol:
74HCT10PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (None pp, sha256
4632d02880fc06fa, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).