component
74HC76S
Public Unreviewedby Ray
GR Flip Flops, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdown74HC76S
GR · Flip Flops · SOP-16
74HC76S from GR, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CK | input | Clock input for flip-flop 1 (active on falling edge). Schmitt-compatible CMOS input; VIH >= 0.7VCC, VIL <= 0.3VCC (approx). |
| 2 | 1PR | input | Preset input for flip-flop 1, active LOW. Asynchronously forces 1Q HIGH / 1Q-bar LOW. |
| 3 | 1CLR | input | Clear input for flip-flop 1, active LOW. Asynchronously forces 1Q LOW / 1Q-bar HIGH. |
| 4 | 1J | input | J data input for flip-flop 1. Sampled on the falling edge of 1CK together with 1K to determine next-state behaviour (hold/set/reset/toggle). |
| 5 | VCC | power_in | Positive supply, 2.0 V to 6.0 V (5 V typical). Absolute maximum -0.5 V to 6.5 V. |
| 6 | 2CK | input | Clock input for flip-flop 2 (active on falling edge). |
| 7 | 2PR | input | Preset input for flip-flop 2, active LOW. Asynchronously forces 2Q HIGH / 2Q-bar LOW. |
| 8 | 2CLR | input | Clear input for flip-flop 2, active LOW. Asynchronously forces 2Q LOW / 2Q-bar HIGH. |
| 9 | 2J | input | J data input for flip-flop 2. Sampled on the falling edge of 2CK together with 2K. |
| 10 | 2Q_N | output | Inverted Q output for flip-flop 2. Push-pull CMOS output; can drive up to 10 LSTTL loads (approx. 4 mA at VCC=4.5 V). |
| 11 | 2Q | output | Non-inverted Q output for flip-flop 2. Push-pull CMOS; drives up to 10 LSTTL loads. |
| 12 | 2K | input | K data input for flip-flop 2. Sampled on the falling edge of 2CK together with 2J. |
| 13 | GND | power_in | Ground (0 V) reference for supply and I/O. |
| 14 | 1Q_N | output | Inverted Q output for flip-flop 1. Push-pull CMOS; drives up to 10 LSTTL loads. |
| 15 | 1Q | output | Non-inverted Q output for flip-flop 1. Push-pull CMOS; drives up to 10 LSTTL loads. |
| 16 | 1K | input | K data input for flip-flop 1. Sampled on the falling edge of 1CK together with 1J. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
74HC76SS74HC76SD
CAD (KiCad official)
- Symbol:
74HC76S - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
74hc76s.step |
217 KB | You want the bare part, or you mark your own boards. |
74hc76s-etched.step |
1.9 MB | You want the part with 74HC76S already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 480 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (5 pp, sha256
b9800ce078bc772d, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).