74HC4060D from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Q11	output	Buffered counter output; stage 11 (divide-by-2048). CMOS push-pull output, IO max ±25 mA.
2	Q12	output	Buffered counter output; stage 12 (divide-by-4096). CMOS push-pull output.
3	Q13	output	Buffered counter output; stage 13 (divide-by-8192). CMOS push-pull output.
4	Q5	output	Buffered counter output; stage 5 (divide-by-32). CMOS push-pull output.
5	Q4	output	Buffered counter output; stage 4 (divide-by-16). CMOS push-pull output.
6	Q6	output	Buffered counter output; stage 6 (divide-by-64). CMOS push-pull output.
7	Q3	output	Buffered counter output; stage 3 (divide-by-8). CMOS push-pull output.
8	GND	power_in	Ground reference (0 V).
9	CTC	passive	External capacitor connection for the on-chip RC/crystal oscillator. Leave floating if RS is driven by an external clock.
10	RTC	passive	External resistor connection for the on-chip RC/crystal oscillator. Leave floating if RS is driven by an external clock.
11	RS	input	Oscillator pin / external clock input. Counter advances on HIGH-to-LOW transitions of RS.
12	MR	input	Master reset input, active HIGH. A HIGH level clears all counter stages and forces all outputs LOW independent of other inputs.
13	Q8	output	Buffered counter output; stage 8 (divide-by-256). CMOS push-pull output.
14	Q7	output	Buffered counter output; stage 7 (divide-by-128). CMOS push-pull output.
15	Q9	output	Buffered counter output; stage 9 (divide-by-512). CMOS push-pull output.
16	VCC	power_in	Positive supply voltage. 2.0 V to 6.0 V for 74HC4060; 4.5 V to 5.5 V for 74HCT4060. Absolute max +7 V.

Key specifications

Parameter	Value
Manufacturer	Nexperia
Package	SOIC-16
Category	Logic
Pins	16

Ordering variants

74HC4060DD
74HC4060DPW
74HC4060DBQ

CAD (KiCad official)

Symbol: 74HC4060D
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`74hc4060d.step`	217 KB	You want the bare part, or you mark your own boards.
`74hc4060d-etched.step`	2.3 MB	You want the part with `74HC4060D` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 578 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Nexperia datasheet (19 pp, sha256 9d9d4fbd139e4a1e, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF