74HC154PW from Nexperia, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Y0	output	Data output 0 (active LOW). Asserts LOW when enabled (E0=E1=LOW) and address = 0000.
2	Y1	output	Data output 1 (active LOW). Asserts LOW when enabled and address = 0001.
3	Y2	output	Data output 2 (active LOW). Asserts LOW when enabled and address = 0010.
4	Y3	output	Data output 3 (active LOW). Asserts LOW when enabled and address = 0011.
5	Y4	output	Data output 4 (active LOW). Asserts LOW when enabled and address = 0100.
6	Y5	output	Data output 5 (active LOW). Asserts LOW when enabled and address = 0101.
7	Y6	output	Data output 6 (active LOW). Asserts LOW when enabled and address = 0110.
8	Y7	output	Data output 7 (active LOW). Asserts LOW when enabled and address = 0111.
9	Y8	output	Data output 8 (active LOW). Asserts LOW when enabled and address = 1000.
10	Y9	output	Data output 9 (active LOW). Asserts LOW when enabled and address = 1001.
11	Y10	output	Data output 10 (active LOW). Asserts LOW when enabled and address = 1010.
12	GND	power_in	Ground reference (0 V).
13	Y11	output	Data output 11 (active LOW). Asserts LOW when enabled and address = 1011.
14	Y12	output	Data output 12 (active LOW). Asserts LOW when enabled and address = 1100.
15	Y13	output	Data output 13 (active LOW). Asserts LOW when enabled and address = 1101.
16	Y14	output	Data output 14 (active LOW). Asserts LOW when enabled and address = 1110.
17	Y15	output	Data output 15 (active LOW). Asserts LOW when enabled and address = 1111.
18	E0	input	Enable input 0 (active LOW). Both E0 and E1 must be LOW for the addressed output to go LOW; a HIGH on either forces all outputs HIGH. Can be used as data input when operating as a 1-to-16 demultiplexer.
19	E1	input	Enable input 1 (active LOW). Both E0 and E1 must be LOW for the addressed output to go LOW; a HIGH on either forces all outputs HIGH. Can be used as data input when operating as a 1-to-16 demultiplexer.
20	A3	input	Address input, bit 3 (MSB). Selects which Y output is asserted when device is enabled.
21	A2	input	Address input, bit 2. Selects which Y output is asserted when device is enabled.
22	A1	input	Address input, bit 1. Selects which Y output is asserted when device is enabled.
23	A0	input	Address input, bit 0 (LSB). Selects which Y output is asserted when device is enabled.
24	VCC	power_in	Supply voltage. Operating range 2.0 V to 6.0 V (74HC154); absolute max +7.0 V.

Key specifications

Parameter	Value
Manufacturer	Nexperia
Package	TSSOP-24
Category	Logic
Pins	24

Ordering variants

Same part, different packaging or reel option.

74HC154PW
74HC154PWD
74HC154PWBQ

CAD (KiCad official)

Symbol: 74HC154PW
Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
3D model: TSSOP-24 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Nexperia datasheet (17 pp, sha256 0d1dd100f18bbd16, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF