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74AUP1G00SE-7

Diodes Incorporated · Gates · SOT-353

74AUP1G00SE-7 from Diodes Incorporated, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the 2-input NAND gate. CMOS Schmitt-trigger input, VI range 0 V to 3.6 V, input current ±0.1 µA typ. Unused inputs should be tied to VCC or GND.
2 B input Data input B of the 2-input NAND gate. CMOS Schmitt-trigger input, VI range 0 V to 3.6 V, input current ±0.1 µA typ. Unused inputs should be tied to VCC or GND.
3 GND power_in Ground reference (0 V) for the device.
4 Y output Push-pull CMOS data output implementing Y = NOT(A AND B). Rated for ±4 mA drive at VCC = 3.0 V; VO range 0 to VCC.
5 VCC power_in Supply voltage input, 0.8 V to 3.6 V operating range (absolute max -0.5 V to +4.6 V). Static supply current ICC < 0.9 µA. Bypass locally with a decoupling capacitor.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-353
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • 74AUP1G00SE-7
  • 74AUP1G00SE-7FS3
  • 74AUP1G00SE-7FW5
  • 74AUP1G00SE-7FW4
  • 74AUP1G00SE-7FX4
  • 74AUP1G00SE-7FZ4

CAD (KiCad official)

  • Symbol: 74AUP1G00SE-7
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (16 pp, sha256 d81d9c3020dfbefa, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF