component
74AHCT00D
Public Unreviewedby Ray
Nexperia Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdown74AHCT00D
Nexperia · Gates · SOP-14
74AHCT00D from Nexperia, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 data input A. TTL-level, Schmitt-trigger, overvoltage tolerant to 5.5 V. VIH ≥ 2.0 V, VIL ≤ 0.8 V at VCC = 4.5-5.5 V. |
| 2 | 1B | input | Gate 1 data input B. TTL-level, Schmitt-trigger, overvoltage tolerant to 5.5 V. |
| 3 | 1Y | output | Gate 1 NAND output. 1Y = NAND(1A, 1B). Drives ±8 mA at VCC = 4.5 V. |
| 4 | 2A | input | Gate 2 data input A. TTL-level, Schmitt-trigger, overvoltage tolerant to 5.5 V. |
| 5 | 2B | input | Gate 2 data input B. TTL-level, Schmitt-trigger, overvoltage tolerant to 5.5 V. |
| 6 | 2Y | output | Gate 2 NAND output. 2Y = NAND(2A, 2B). |
| 7 | GND | power_in | Ground reference (0 V). |
| 8 | 3Y | output | Gate 3 NAND output. 3Y = NAND(3A, 3B). |
| 9 | 3A | input | Gate 3 data input A. TTL-level, Schmitt-trigger, overvoltage tolerant to 5.5 V. |
| 10 | 3B | input | Gate 3 data input B. TTL-level, Schmitt-trigger, overvoltage tolerant to 5.5 V. |
| 11 | 4Y | output | Gate 4 NAND output. 4Y = NAND(4A, 4B). |
| 12 | 4A | input | Gate 4 data input A. TTL-level, Schmitt-trigger, overvoltage tolerant to 5.5 V. |
| 13 | 4B | input | Gate 4 data input B. TTL-level, Schmitt-trigger, overvoltage tolerant to 5.5 V. |
| 14 | VCC | power_in | Positive supply voltage. Recommended 4.5-5.5 V for 74AHCT00 (TTL-input variant). Absolute max +7.0 V. Decouple with a local 100 nF to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
74AHCT00DD74AHCT00DPW74AHCT00DBQ
CAD (KiCad official)
- Symbol:
74AHCT00D - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
74ahct00d.step |
195 KB | You want the bare part, or you mark your own boards. |
74ahct00d-etched.step |
2.0 MB | You want the part with 74AHCT00D already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 511 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (12 pp, sha256
8f6f3b15e8039940, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).