24C128BN from XBLW 24C128BN XBLW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	A0	input	Device/chip select address input bit 0. Hardwire to VIH or VIL to set the slave address; if left unconnected, internally recognized as VIL.
2	A1	input	Device/chip select address input bit 1. Hardwire to VIH or VIL to set the slave address; if left unconnected, internally recognized as VIL.
3	A2	input	Device/chip select address input bit 2. Hardwire to VIH or VIL to set the slave address; if left unconnected, internally recognized as VIL.
4	GND	power_in	Ground reference for the device.
5	SDA	bidirectional	Serial data input / open-drain output. Bi-directional I2C data line; requires an external pull-up resistor and can be wire-OR'd with other open-drain devices.
6	SCL	input	Serial clock input. Rising edge latches data into the EEPROM; falling edge clocks data out. Supports up to 1MHz (2.5-5.5V) or 400kHz (1.8V).
7	WP	input	Write Protect. Tie to VIH or VCC to disable all programming (array is write-protected); tie to VIL or leave unconnected to allow writes. Read operations are unaffected.
8	VCC	power_in	Power supply input, 1.8V to 5.5V. A decoupling capacitor of at least 10nF should be connected close to this pin.

Key specifications

Parameter	Value
Manufacturer	XBLW 24C128BN XBLW
Package	SOP-8
Category	Memory
Pins	8

Ordering variants

24C128BN
24C128BNN
24C128BNMN
24C128BNTN
24C128BNDN

CAD (KiCad official)

Symbol: 24C128BN
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XBLW 24C128BN XBLW datasheet (15 pp, sha256 d3fd02f7abbe5865, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF