skill
Breakout Board Creator
UnreviewedGenerate breakout board designs for any electronic component — place the chip at center,
{
"schema_version": 1,
"type": "skill",
"slug": "molecule-breakout-board-creator",
"title": "Breakout Board Creator",
"brief": "Generate breakout board designs for any electronic component — place the chip at center,",
"version": "1.0.1",
"tags": [],
"license": "MIT",
"discovery_triggers": [
"breakout board",
"breakout for",
"dev board for chip",
"break out pins",
"ic to breakout",
"molecule",
"create breakout",
"2mm header breakout",
"machine pin breakout"
],
"discovery_pitch": "I can turn any IC into an Adom molecule — a breakout board with 2mm pin headers and 4 corner machine pins — so you can plug it straight into an Adom workcell or breadboard.",
"source_path": "SKILL.md",
"readme": "---\nname: molecule-breakout-board-creator\ndescription: Create breakout board designs for electronic components (ICs, modules, sensors).\n Auto-generates a breakout PCB that exposes all chip pins to header rows with proper decoupling.\n Use when user asks to \"create a breakout board\", \"breakout for STM32\", \"make a dev board\",\n \"generate breakout PCB\", or \"breakout layout for [component]\".\n---\n\n# Molecule Breakout Board Creator\n\nGenerate breakout board designs for any electronic component — place the chip at center,\nroute all pins to edge headers, add power decoupling, and output as an Adom molecule\nwith symbol, footprint, 3D model, and interactive viewer.\n\n## When to Use\n\n- User asks to create a breakout board for any IC, module, or sensor\n- User wants a dev board layout for a specific component\n- A wiki component page needs its breakout board section populated\n- User asks to \"break out\" a chip or expose its pins\n\n## Prerequisites\n\nBefore creating a breakout board, ensure the target component has:\n1. **A symbol** — created via `symbol-creator` skill, or look up in wiki\n2. **A footprint** — created via `footprint-creator` skill, or look up in wiki\n3. **Pin information** — from datasheet, JLCPCB, or existing symbol metadata\n\nIf any are missing, create them first using the respective skills.\n\n## Workflow\n\n### Step 1: Gather Component Info\n\nCollect the target component's specifications:\n- Component name and manufacturer\n- Package type and pin count\n- Pin names, functions, and electrical types (from symbol metadata or datasheet)\n- Power pins (VCC/VDD, GND) and their voltage levels\n\nCheck for existing data:\n```\n# Check wiki for existing symbol/footprint\nwiki_search({ query: \"STM32F103C8T6\" })\n\n# Check if symbol already exists\nls /home/adom/project/project-content/schematics/symbols/STM32F103C8T6/\n\n# Check JLCPCB for component data\njlcpcb_search({ query: \"STM32F103C8T6\" })\n```\n\n### Step 2: Design the Breakout Layout\n\nGenerate a breakout specification based on the component:\n\n**Board sizing rules:**\n- Width = max(component_width + 20mm, pin_rows * pitch + 10mm)\n- Height = max(component_height + 30mm, pin_columns * pitch + 10mm)\n- Minimum board size: 30mm x 30mm\n- Round up to nearest 2mm increment\n\n**Pin placement rules:**\n- IC/module placed at board center\n- All pins routed straight out to 2.54mm-pitch header rows on board edges\n- Left-side IC pins → left header row\n- Right-side IC pins → right header row\n- Top/bottom IC pins → distributed to nearest edge\n- Power pins (VCC, GND) duplicated to all 4 corners for easy access\n\n**Decoupling capacitor rules:**\n- One 100nF ceramic cap per VCC/VDD pin, placed within 3mm\n- One 10uF bulk cap per power rail, near board edge\n- GND via near each decoupling cap\n\n### Step 3: Generate Breakout Specification JSON\n\nCreate a breakout spec file:\n\n```json\n{\n \"name\": \"STM32F103C8T6_Breakout\",\n \"version\": \"v1\",\n \"component\": {\n \"name\": \"STM32F103C8T6\",\n \"manufacturer\": \"STMicroelectronics\",\n \"package\": \"LQFP-48\",\n \"pinCount\": 48\n },\n \"board\": {\n \"width_mm\": 50,\n \"height_mm\": 60,\n \"cornerRadius_mm\": 1,\n \"mountingHoles\": true,\n \"headerPitch_mm\": 2.54\n },\n \"powerRails\": [\n { \"name\": \"3V3\", \"voltage\": 3.3, \"pins\": [\"VDD_1\", \"VDD_2\", \"VDD_3\", \"VDDA\"] },\n { \"name\": \"GND\", \"voltage\": 0, \"pins\": [\"VSS_1\", \"VSS_2\", \"VSS_3\", \"VSSA\"] }\n ],\n \"decoupling\": [\n { \"value\": \"100nF\", \"package\": \"0402\", \"perPin\": true, \"rails\": [\"3V3\"] },\n { \"value\": \"10uF\", \"package\": \"0805\", \"perRail\": true, \"rails\": [\"3V3\"] }\n ],\n \"pinMapping\": [\n { \"icPin\": \"PA0\", \"function\": \"GPIO/ADC\", \"side\": \"left\", \"row\": 0 },\n { \"icPin\": \"PA1\", \"function\": \"GPIO/ADC\", \"side\": \"left\", \"row\": 1 }\n ]\n}\n```\n\n### Step 4: Generate Output Files\n\nCreate the molecule directory structure:\n\n```\n/home/adom/project/molecules/adom/COMPONENT_Breakout/\n metadata.json\n v1/\n COMPONENT_Breakout_symbol.json # Board-level symbol (all header pins)\n COMPONENT_Breakout_footprint.json # PCB footprint with pads\n COMPONENT_Breakout.kicad_pcb # KiCad PCB file (if KiCad CLI available)\n breakout-spec.json # The specification from Step 3\n images/\n top.png # Board top render\n bottom.png # Board bottom render\n optimized/\n model.glb # 3D model for viewer\n```\n\n**Symbol JSON** — follows the scaffold symbol pattern:\n```json\n{\n \"symbolName\": \"STM32F103C8T6_Breakout\",\n \"pins\": [\n {\n \"name\": \"PA0\",\n \"edge\": \"left\",\n \"position\": [0, 0, 0],\n \"orientation\": \"left\",\n \"originalPadDetails\": {\n \"finalName\": \"PA0\",\n \"holeType\": \"medium\",\n \"holeSubtype\": \"contact\",\n \"drill\": 1.0\n }\n }\n ]\n}\n```\n\n**Footprint JSON** — follows the scaffold footprint pattern:\n```json\n{\n \"boardName\": \"STM32F103C8T6_Breakout\",\n \"boardDimensions\": { \"width\": 50, \"height\": 60 },\n \"machinePins\": [\n { \"name\": \"MH1\", \"packageName\": \"MOUNTING_HOLE\", \"drillDiameter\": 3.2, \"position\": {\"x\": 3, \"y\": 3} },\n { \"name\": \"MH2\", \"packageName\": \"MOUNTING_HOLE\", \"drillDiameter\": 3.2, \"position\": {\"x\": 47, \"y\": 3} },\n { \"name\": \"MH3\", \"packageName\": \"MOUNTING_HOLE\", \"drillDiameter\": 3.2, \"position\": {\"x\": 3, \"y\": 57} },\n { \"name\": \"MH4\", \"packageName\": \"MOUNTING_HOLE\", \"drillDiameter\": 3.2, \"position\": {\"x\": 47, \"y\": 57} }\n ],\n \"contacts\": [\n { \"name\": \"PA0\", \"elementName\": \"J1-1\", \"packageName\": \"HEADER_2P54\", \"drillDiameter\": 1.0, \"position\": {\"x\": 2.54, \"y\": 10} }\n ]\n}\n```\n\n### Step 5: Generate Interactive Viewer\n\nCreate a 2D interactive HTML viewer (self-contained, no external deps):\n- Board outline with rounded corners\n- IC package silhouette at center\n- Header pin rows on edges with labels\n- Color-coded by signal type:\n - Power (VCC): `#f85149` (red)\n - Ground: `#3fb950` (green)\n - GPIO: `#58a6ff` (blue)\n - Analog: `#d29922` (gold)\n - Communication (SPI/I2C/UART): `#bc8cff` (purple)\n - Other: `#8b949e` (gray)\n- Pan and zoom via mouse\n- Hover shows pin name, function, and IC pin mapping\n- Dark theme matching Hydrogen (`#0d1117` background)\n\n### Step 6: Display in Gallia Viewer\n\n```\n# Display 3D model (if available)\ngv_3d_display({ glb_path: \"/path/to/model.glb\", title: \"STM32F103 Breakout\" })\n\n# Display 2D viewer\ngv_display_file({ path: \"/path/to/breakout-2d.html\", title: \"STM32F103 Breakout - 2D\" })\n```\n\n### Step 7: Update Wiki (if wiki service running)\n\n```\n# Add or update the breakout section on the component's wiki page\nwiki_edit_page({\n type: \"component\",\n slug: \"stm32f103c8t6\",\n field: \"content\",\n content: \"... updated content with breakout board section ...\"\n})\n```\n\n## Signal Type Classification\n\nClassify each pin for color coding:\n\n| Signal Type | Color | Examples |\n|-------------|-------|---------|\n| Power | Red `#f85149` | VCC, VDD, VBAT |\n| Ground | Green `#3fb950` | GND, VSS, AGND |\n| GPIO | Blue `#58a6ff` | PA0, PB1, GPIO4 |\n| Analog | Gold `#d29922` | ADC_IN, DAC_OUT |\n| Communication | Purple `#bc8cff` | SPI_MOSI, I2C_SDA, UART_TX |\n| Clock/Reset | Cyan `#00b8b0` | XTAL, NRST, CLK |\n| Debug | Orange `#f0883e` | SWDIO, SWCLK, JTAG |\n| NC/Reserved | Gray `#8b949e` | NC, RESERVED |\n\n## Board Design Templates\n\n### Small IC (< 20 pins, QFN/SSOP/SOT)\n- Board: 30mm x 40mm\n- Single row headers on left and right\n- 2 mounting holes (diagonal corners)\n\n### Medium IC (20-64 pins, LQFP/QFP)\n- Board: 50mm x 60mm\n- Dual row headers on left and right\n- 4 mounting holes (all corners)\n\n### Large IC (64+ pins, BGA/LQFP-100+)\n- Board: 70mm x 80mm\n- Quad row headers on all 4 sides\n- 4 mounting holes + additional mid-edge holes\n\n### Module (ESP32, etc.)\n- Board: module_width + 15mm x module_height + 30mm\n- Headers match module pin spacing\n- Antenna keepout zone marked\n- USB/programming header at board edge\n\n## Example: Complete STM32F103 Breakout\n\n```\nUser: Create a breakout board for the STM32F103C8T6\n\nSteps:\n1. Look up STM32F103C8T6 — 48-pin LQFP, Cortex-M3\n2. Get pin data from existing symbol or datasheet\n3. Use \"Medium IC\" template: 50x60mm board\n4. Map 48 pins to left/right headers (24 per side)\n5. Add 4x 100nF caps (3 VDD + 1 VDDA)\n6. Add 1x 10uF bulk cap\n7. Add 8MHz crystal + 2x 20pF load caps (optional)\n8. Add SWD debug header (4-pin: SWDIO, SWCLK, GND, 3V3)\n9. Generate symbol, footprint, 3D model, 2D viewer\n10. Display in Gallia Viewer\n11. Save as molecule: /home/adom/project/molecules/adom/STM32F103C8T6_Breakout/\n```\n",
"author": {
"id": "695820315b5f1e4db2fcf602",
"name": "Kyle Bergstedt",
"email": "[email protected]"
},
"visibility": {
"public": true
},
"hero": null,
"sample_prompts": [],
"metadata": {},
"created_at": "2026-05-28T05:30:07.597Z",
"updated_at": "2026-05-28T05:30:07.597Z",
"sub_skills": [],
"parent_app": null
}