ADUM7643CRQZ from Analog Devices, in a QSOP-20-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD1A	power_in	Supply voltage A for isolator side 1 (3.0 V to 5.5 V); must be connected externally to Pin 7, with 0.01 µF to 0.1 µF bypass to GND1 (Pin 2).
2	GND1	power_in	Ground reference for isolator side 1; internally connected to Pin 10, and connecting both to the PCB ground plane is recommended.
3	VIA	input	Logic input A.
4	VIB	input	Logic input B.
5	VOC	output	Logic output C.
6	VOD	output	Logic output D.
7	VDD1B	power_in	Supply voltage B for isolator side 1 (3.0 V to 5.5 V); must be connected externally to Pin 1, with 0.01 µF to 0.1 µF bypass to GND1 (Pin 10).
8	VOE	output	Logic output E.
9	VIF	input	Logic input F.
10	GND1	power_in	Ground reference for isolator side 1; internally connected to Pin 2, and connecting both to the PCB ground plane is recommended.
11	GND2	power_in	Ground reference for isolator side 2; internally connected to Pin 19, and connecting both to the PCB ground plane is recommended.
12	VOF	output	Logic output F.
13	VIE	input	Logic input E.
14	VDD2B	power_in	Supply voltage B for isolator side 2 (3.0 V to 5.5 V); must be connected externally to Pin 20, with 0.01 µF to 0.1 µF bypass to GND2 (Pin 11).
15	VID	input	Logic input D.
16	VIC	input	Logic input C.
17	VOB	output	Logic output B.
18	VOA	output	Logic output A.
19	GND2	power_in	Ground reference for isolator side 2; internally connected to Pin 11, and connecting both to the PCB ground plane is recommended.
20	VDD2A	power_in	Supply voltage A for isolator side 2 (3.0 V to 5.5 V); must be connected externally to Pin 14, with 0.01 µF to 0.1 µF bypass to GND2 (Pin 19).

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	QSOP-20-150mil
Category	Interface ICs
Pins	20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Pulse Width (C grade)	PW			40	ns	Within PWD limit; 5 V operation	4
Data Rate (C grade)		25			Mbps	Within PWD limit; 5 V operation	4
Propagation Delay (C grade)	tPHL, tPLH	28	40	50	ns	50% input to 50% output; 5 V operation	4
Pulse Width Distortion (C grade)	PWD		2	6	ns	/tPLH − tPHL/; 5 V operation	4
Propagation Delay Skew (C grade)	tPSK			14	ns	5 V operation	4
Codirectional Channel Matching (C grade)	tPSKCD		6	12	ns	5 V operation	4
Opposing Directional Channel Matching (C grade)	tPSKOD		7	12	ns	5 V operation	4
Supply current IDD1, 1 Mbps	IDD1		4.8	6	mA	1 Mbps, no load; 5 V operation	4
Supply current IDD2, 1 Mbps	IDD2		5	6.3	mA	1 Mbps, no load; 5 V operation	4
Supply current IDD1, 25 Mbps	IDD1		24	30	mA	25 Mbps C grade, no load; 5 V operation	4
Supply current IDD2, 25 Mbps	IDD2		22	29	mA	25 Mbps C grade, no load; 5 V operation	4
Logic Low Output Voltage	VOL		0	0.1	V	IOx = 20 µA, VIx = VIxL; 5 V operation	4
Logic Low Output Voltage	VOL		0.2	0.4	V	IOx = 4 mA, VIx = VIxL; 5 V operation	4
Input Current per Channel	II	-10	0.01	10	µA	0 V ≤ VIx ≤ VDDx; 5 V operation	5
Input Quiescent Supply Current per Channel	IDDI (Q)		0.95	1.16	mA	5 V operation	5
Output Quiescent Supply Current per Channel	IDDO (Q)		0.73	0.98	mA	5 V operation	5
Common-Mode Transient Immunity	/CM/	15	25		kV/µs	VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V; 5 V operation	5
Propagation Delay (C grade)	tPHL, tPLH	33	49	66	ns	50% input to 50% output; 3.3 V operation	5
Pulse Width Distortion (C grade)	PWD		2	6	ns	/tPLH − tPHL/; 3.3 V operation	5
Propagation Delay Skew (C grade)	tPSK			14	ns	3.3 V operation	5
Codirectional Channel Matching (C grade)	tPSKCD		6	12	ns	3.3 V operation	5
Opposing Directional Channel Matching (C grade)	tPSKOD		6	15	ns	3.3 V operation	5
Supply current IDD1, 1 Mbps	IDD1		3.5	4.4	mA	1 Mbps, no load; 3.3 V operation	6
Supply current IDD2, 1 Mbps	IDD2		3.6	4.5	mA	1 Mbps, no load; 3.3 V operation	6
Supply current IDD1, 25 Mbps	IDD1		18	21	mA	25 Mbps C grade, no load; 3.3 V operation	6
Supply current IDD2, 25 Mbps	IDD2		16	20	mA	25 Mbps C grade, no load; 3.3 V operation	6
Logic Low Output Voltage	VOL		0	0.1	V	IOx = 20 µA, VIx = VIxL; 3.3 V operation	6
Logic Low Output Voltage	VOL		0.2	0.4	V	IOx = 4 mA, VIx = VIxL; 3.3 V operation	6
Input Current per Channel	II	-10	0.01	10	µA	0 V ≤ VIx ≤ VDDx; 3.3 V operation	6
Input Quiescent Supply Current per Channel	IDDI (Q)		0.68	0.87	mA	3.3 V operation	6
Output Quiescent Supply Current per Channel	IDDO (Q)		0.55	0.72	mA	3.3 V operation	6
Common-Mode Transient Immunity	/CM/	15	20		kV/µs	VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V; 3.3 V operation	6
Propagation Delay (C grade)	tPHL, tPLH	30	42	58	ns	50% input to 50% output; mixed 5 V/3.3 V operation	6
Propagation Delay (C grade)	tPHL, tPLH	29	46	60	ns	50% input to 50% output; mixed 3.3 V/5 V operation	8
Operating Temperature	TA	-40		105	°C		10
Supply Voltages	VDD1, VDD2	3		5.5	V		10
Input Signal Rise and Fall Times				1	ms		10
Storage Temperature	TST	-65		150	°C	TA = 25°C	11
Ambient Operating Temperature	TA	-40		105	°C		11
Supply Voltages	VDD1, VDD2	-0.5		7	V		11
Average Output Current per Pin, Side 1	IO1	-10		10	mA		11
Average Output Current per Pin, Side 2	IO2	-10		10	mA		11
Common-Mode Transients		-100		100	kV/µs	Across the insulation barrier	11
Maximum Continuous Working Voltage, Basic Insulation				420	V peak	50-year minimum lifetime	11
IC Junction-to-Ambient Thermal Resistance	θJA		76		°C/W	Thermocouple located at center of package underside	9
Resistance (Input to Output)	RI-O		1013		Ω		9
Capacitance (Input to Output)	CI-O		2		pF	f = 1 MHz	9
Input Capacitance	CI		4		pF	From any input data pin to ground	9
Rated Dielectric Insulation Voltage	VISO		1000		V rms	1 minute duration	9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	abs		3 Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause latch-up	11

CAD (KiCad official)

Symbol: ADUM7643CRQZ
Footprint: Package_SO:QSOP-20_3.9x8.7mm_P0.635mm
3D model: QSOP-20-150mil (KiCad packages3D, STEP)
3D model files: adum7643crqz-etched.step / adum7643crqz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum7643crqz.step / adum7643crqz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (22 pp, sha256 d5f48833ac0414f1, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ADUM7643CRQZ

Verified ADUM7643CRQZ

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3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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