component
XC6219B182MR-MS
Public Made by Adomby adom
MSKSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXC6219B182MR-MS
MSKSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
XC6219B182MR-MS from MSKSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input pin; the absolute maximum supply voltage is 8 V (range -0.3 V to 8 V), and the input capacitor of 10 uF should be connected between VIN and GND. |
| 2 | GND | power_in | Ground pin; keep the wiring resistance between VIN and GND low to avoid instability, and place the input and output capacitors as close to the IC as possible. |
| 3 | CE | input | Chip enable pin that shuts the internal circuitry down; the datasheet recommends driving it with either a VIN or VSS voltage, and its logic is selectable per the selection guide. |
| 4 | NC | unconnected | No connection pin, listed as NC in the package pin assignment table. |
| 5 | VOUT | power_out | Regulated output pin; connect an output capacitor of at least 10 uF as close as possible to VOUT and GND for phase compensation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (tolerance) | VOUT | -2 | 2 | % | Vin=Vout+1V, 1.0mA≤Iout≤30mA | 5 | |
| Load Regulation | ΔVout | 10 | 30 | V | Vin=4.3V, 1.0mA≤Iout≤100mA | 5 | |
| Line Regulation | ΔVout1/(ΔVin·Vout) | 0.05 | 0.2 | %/V | 4.3V≤Vin≤8V, Iout=10mA | 5 | |
| Supply Current | Iss1 | 40 | 40 | uA | 5 | ||
| Input Voltage | Vin | 8 | V | 5 | |||
| Supply Voltage (absolute maximum) | -0.3 | 8 | V | 4 | |||
| Storage Temperature | -50 | 125 | °C | 4 | |||
| Operating Temperature | -40 | 85 | °C | 4 | |||
| Output voltage temperature coefficient | ΔVout/(Ta·Vout) | -100 | 100 | ppm/°C | Iout=30mA, 0°C≤Ta≤70°C | 5 | |
| Thermal Resistance (Junction to Ambient), SOT23-5 | θJA | 500 | ℃/W | Assume no ambient airflow, no heat sink | 4 | ||
| Power Dissipation, SOT23-5 | PD | 0.25 | W | Note: PD is measured at Ta=25℃ | 4 | ||
| Output Current | Iout | 350 | mA | Vin-Vout=1V | 5 | ||
| PSRR | PSRR | 60 | dB | F=1KHz, Vin=4.3Vdc+1Vpp | 5 | ||
| Output voltage (nominal, this MPN) | VOUT | 1.8 | V | 3 |
CAD (KiCad official)
- Symbol:
XC6219B182MR-MS - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
xc6219b182mr-ms-etched.step/xc6219b182mr-ms-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xc6219b182mr-ms.step/xc6219b182mr-ms.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (9 pp, sha256
86e38fb7ca4262ed, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).