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STM32F410CBU6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f410cbu6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

Schematic Symbol

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Datasheet

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Contents

README

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STM32F410CBU6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)

STM32F410CBU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Supply for RTC, 32 kHz oscillator and backup registers via power switch when VDD is absent (1.65 to 3.6 V).
2 PC13 bidirectional FT I/O, supplied via power switch (3 mA sink), output limited to 2 MHz with 30 pF max load; EVENTOUT, RTC_TAMP1, RTC_OUT, RTC_TS.
3 PC14-OSC32_IN bidirectional FT I/O supplied via power switch with output limited to 2 MHz and 30 pF; 32 kHz oscillator input (OSC32_IN), EVENTOUT.
4 PC15-OSC32_OUT bidirectional FT I/O supplied via power switch with output limited to 2 MHz and 30 pF; 32 kHz oscillator output (OSC32_OUT), EVENTOUT.
5 PH0-OSC_IN bidirectional FT I/O; 4-26 MHz oscillator input (OSC_IN), EVENTOUT.
6 PH1-OSC_OUT bidirectional FT I/O; 4-26 MHz oscillator output (OSC_OUT), EVENTOUT.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
8 VSSA/VREF- power_in Analog ground and negative reference; must be connected to VSS with decoupling.
9 VDDA/VREF+ power_in Analog supply (1.7 to 3.6 V) for ADC, reset blocks, RCs and PLL and positive reference; must be connected to VDD with decoupling.
10 PA0 bidirectional FT I/O; TIM5_CH1, USART2_CTS, EVENTOUT, ADC1_0, WKUP1.
11 PA1 bidirectional FT I/O; TIM5_CH2, USART2_RTS, EVENTOUT, ADC1_1.
12 PA2 bidirectional FT I/O; TIM5_CH3, TIM9_CH1, I2S2_CKIN, USART2_TX, EVENTOUT, ADC1_2.
13 PA3 bidirectional FT I/O; TIM5_CH4, TIM9_CH2, I2S2_MCK, USART2_RX, EVENTOUT, ADC1_3.
14 PA4 bidirectional FT I/O; SPI1_NSS/I2S1_WS, USART2_CK, EVENTOUT, ADC1_4.
15 PA5 bidirectional TC (3.3 V) I/O; SPI1_SCK/I2S1_CK, EVENTOUT, ADC1_5, DAC_OUT1.
16 PA6 bidirectional FT I/O; TIM1_BKIN, SPI1_MISO, I2S2_MCK, EVENTOUT, ADC1_6.
17 PA7 bidirectional FT I/O; TIM1_CH1N, SPI1_MOSI/I2S1_SD, EVENTOUT, ADC1_7.
18 PB0 bidirectional FT I/O; TIM1_CH2N, SPI5_SCK/I2S5_CK, EVENTOUT, ADC1_8.
19 PB1 bidirectional TC (3.3 V) I/O; TIM1_CH3N, SPI5_NSS/I2S5_WS, EVENTOUT, ADC1_9.
20 PB2 bidirectional FT I/O; LPTIM1_OUT, EVENTOUT, BOOT1.
21 PB10 bidirectional FT I/O; I2C2_SCL, SPI2_SCK/I2S2_CK, I2S1_MCK, I2C4_SCL, EVENTOUT.
22 VCAP_1 passive Connection for the internal 1.2 V regulator's external capacitor.
23 VSS power_in Ground supply pin.
24 VDD power_in Digital supply for I/Os, 1.7 to 3.6 V.
25 PB12 bidirectional FT I/O; TIM1_BKIN, TIM5_CH1, I2C2_SMBA, SPI2_NSS/I2S2_WS, EVENTOUT.
26 PB13 bidirectional FT I/O; TIM1_CH1N, I2C4_SMBA, SPI2_SCK/I2S2_CK, EVENTOUT.
27 PB14 bidirectional FT I/O; TIM1_CH2N, I2C4_SDA, SPI2_MISO, EVENTOUT.
28 PB15 bidirectional FT I/O; RTC_50Hz, TIM1_CH3N, I2C4_SCL, SPI2_MOSI/I2S2_SD, EVENTOUT.
29 PA8 bidirectional FT I/O; MCO_1, TIM1_CH1, I2C4_SCL, USART1_CK, EVENTOUT.
30 PA9 bidirectional FT I/O; TIM1_CH2, USART1_TX, EVENTOUT.
31 PA10 bidirectional FT I/O; TIM1_CH3, SPI5_MOSI/I2S5_SD, USART1_RX, EVENTOUT.
32 PA11 bidirectional FT I/O; TIM1_CH4, USART1_CTS, USART6_TX, EVENTOUT.
33 PA12 bidirectional FT I/O; TIM1_ETR, SPI5_MISO, USART1_RTS, USART6_RX, EVENTOUT.
34 PA13 bidirectional FT I/O; JTMS-SWDIO debug pin after reset, EVENTOUT.
35 VSS power_in Ground supply pin.
36 VDD power_in Digital supply for I/Os, 1.7 to 3.6 V.
37 PA14 bidirectional FT I/O; JTCK-SWCLK debug pin after reset, EVENTOUT.
38 PA15 bidirectional FT I/O; JTDI, SPI1_NSS/I2S1_WS, USART1_TX, EVENTOUT.
39 PB3 bidirectional FT I/O; JTDO-SWO, I2C4_SDA, SPI1_SCK/I2S1_CK, USART1_RX, I2C2_SDA, EVENTOUT.
40 PB4 bidirectional FT I/O; JTRST, SPI1_MISO, EVENTOUT.
41 PB5 bidirectional FT I/O; LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI/I2S1_SD, EVENTOUT.
42 PB6 bidirectional FT I/O; LPTIM1_ETR, I2C1_SCL, USART1_TX, EVENTOUT.
43 PB7 bidirectional FT I/O; LPTIM1_IN2, I2C1_SDA, USART1_RX, EVENTOUT.
44 BOOT0 input Dedicated boot mode selection input pin (BOOT0).
45 PB8 bidirectional FT I/O; LPTIM1_OUT, I2C1_SCL, SPI5_MOSI/I2S5_SD, EVENTOUT.
46 PB9 bidirectional FT I/O; TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, I2C2_SDA, EVENTOUT.
47 VSS power_in Ground supply pin.
48 VDD power_in Digital supply for I/Os, 1.7 to 3.6 V.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-48(7x7)
Category Embedded Processors & Controllers
Pins 49

CAD (KiCad official)

  • Symbol: STM32F410CBU6
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f410cbu6-etched.step / stm32f410cbu6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f410cbu6.step / stm32f410cbu6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (143 pp, sha256 71946dd94c3eb53f, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF