component
JTD6206-25
Public Made by Adomby adom
JTD Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownJTD6206-25
JTD · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23
JTD6206-25 from JTD, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground (Vss) pin, the common return for input and output; shown as pin 1 in the typical application and at bottom-left of the SOT23 top view. |
| 2 | VOUT | power_out | Regulated output voltage pin (fixed, 2.5V for the -25 option, ±2% accuracy) with up to 300mA output current and a 1.0uF ceramic load capacitor in the typical application. |
| 3 | VIN | power_in | Input supply pin, rated 8V absolute maximum with 6V typical operating input, decoupled with a 1.0uF ceramic capacitor in the typical application. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JTD |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (tolerance) | Vout | -2 | 2 | % | Printed as output voltage accuracy tolerance ±2% (table row is Vout×0.98 to Vout×1.02, Vin=Vout+1V, 1.0mA≤Iout≤30mA) | 1 | |
| Line Regulation | △Vout1/(Vin·Vout) | 0.05 | 0.2 | %/V | 1.6V≤Vin≤8V Iout=40mA | 3 | |
| Load Regulation | △Vout /ΔIout | 12 | 30 | mV | Vin= Vout+1V 1.0mA≤Iout≤80mA | 3 | |
| Output voltage Temperature Coefficient | △Vout/(Ta·Vout) | -100 | 100 | Ppm/℃ | Iout=30mA 0℃≤Ta≤70℃ (printed ±100) | 3 | |
| Supply Current | Iss | 3 | 5 | uA | 3 | ||
| Input Voltage | Vin | 6 | 8 | V | 3 | ||
| Output Current | Iout | 300 | mA | Vin-Vout=1V | 3 | ||
| Power Supply Rejection Ratio | PSRR | 50 | dB | F=1KHz Vin=Vout+1V | 3 | ||
| Output Noise | EN | 30 | uVrms | BW=10Hz～100KHz | 3 | ||
| Input Voltage (absolute maximum) | VIN | 8 | V | 3 | |||
| Output Current (absolute maximum) | IOUT | 300 | mA | *IOUT=Pd/(VIN-VOUT) | 3 | ||
| Power Dissipation SOT-23 | Pd | 0.2 | W | SOT-23 package | 3 | ||
| Operating Temperature Range | Topr | -40 | 85 | ℃ | 3 | ||
| Storage Temperature Range | Tstg | -55 | 125 | ℃ | 3 |
CAD (KiCad official)
- Symbol:
JTD6206-25 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
jtd6206-25-etched.step/jtd6206-25-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jtd6206-25.step/jtd6206-25.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JTD datasheet (8 pp, sha256
3e7bcacf7806491a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).