component
ADUM1286ARZ
Public Made by Adomby adom
Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownADUM1286ARZ
Analog Devices · Digital Isolators · SOIC-8
ADUM1286ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V. |
| 2 | VOA | output | Logic Output A; per the ADuM1286 truth table it is indeterminate while VDD1 is unpowered and returns to the input state within 1.6 µs of VDD1 power restoration. |
| 3 | VIB | input | Logic Input B; logic-high threshold is 0.7 VDDx minimum and logic-low threshold is 0.3 VDDx maximum. |
| 4 | GND1 | power_in | Ground 1, the ground reference for Isolator Side 1. |
| 5 | GND2 | power_in | Ground 2, the ground reference for Isolator Side 2. |
| 6 | VOB | output | Logic Output B; per the ADuM1286 truth table it is indeterminate while VDD2 is unpowered and returns to the input state within 1.6 µs of VDD2 power restoration. |
| 7 | VIA | input | Logic Input A; logic-high threshold is 0.7 VDDx minimum and logic-low threshold is 0.3 VDDx maximum. |
| 8 | VDD2 | power_in | Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | TA | -40 | 125 | °C | 10 | ||
| Supply Voltages | VDD1, VDD2 | 3.135 | 5.5 | V | A, B, and C Grades | 10 | |
| Input Signal Rise and Fall Times | 1 | ms | 10 | ||||
| Storage Temperature Range | TST | -65 | 150 | °C | 11 | ||
| Ambient Operating Temperature Range | TA | -40 | 125 | °C | 11 | ||
| Supply Voltages | VDD1, VDD2 | -0.5 | 7 | V | 11 | ||
| Average Output Current per Pin, Side 1 | IO1 | -10 | 10 | mA | 11 | ||
| Average Output Current per Pin, Side 2 | IO2 | -10 | 10 | mA | 11 | ||
| Common-Mode Transients | -100 | 100 | kV/μs | 11 | |||
| Pulse Width (5 V, A grade) | PW | 1000 | ns | Within PWD limit | 3 | ||
| Data Rate (5 V, A grade) | 1 | Mbps | Within PWD limit | 3 | |||
| Propagation Delay (5 V, A grade) | tPHL, tPLH | 50 | ns | 50% input to 50% output | 3 | ||
| Pulse Width Distortion (5 V, A grade) | PWD | 10 | ns | /tPLH − tPHL/ | 3 | ||
| Pulse Width Distortion Change vs. Temperature (5 V, A grade) | 7 | ps/°C | 3 | ||||
| Propagation Delay Skew (5 V, A grade) | tPSK | 38 | ns | Between any two units at same operating conditions | 3 | ||
| Channel Matching Codirectional (5 V, A grade) | tPSKCD | 5 | ns | 3 | |||
| Channel Matching Opposing-Direction (5 V, A grade) | tPSKOD | 10 | ns | 3 | |||
| Jitter (5 V, A grade) | 2 | ns | 3 | ||||
| Supply Current IDD1 (ADuM1286, 5 V, 1 Mbps) | IDD1 | 2.1 | 2.6 | mA | No load; 1 Mbps | 3 | |
| Supply Current IDD2 (ADuM1286, 5 V, 1 Mbps) | IDD2 | 2.3 | 2.9 | mA | No load; 1 Mbps | 3 | |
| Logic Low Output Voltage (5 V) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 3 | |
| Logic Low Output Voltage (5 V) | VOL | 0.2 | 0.4 | V | IOx = 3.2 mA, VIx = VIxL | 3 | |
| Input Current per Channel (5 V) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 3 |
| Quiescent Input Supply Current (5 V) | IDDI(Q) | 0.54 | 0.8 | mA | 3 | ||
| Quiescent Output Supply Current (5 V) | IDDO(Q) | 1.6 | 2 | mA | 3 | ||
| Common-Mode Transient Immunity (5 V) | /CM/ | 25 | 35 | kV/µs | VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V | 4 | |
| Refresh Period (5 V) | tr | 1.6 | µs | 4 | |||
| Output Rise/Fall Time (5 V) | tR/tF | 2.5 | ns | 10% to 90% | 4 | ||
| Pulse Width (3.3 V, A grade) | PW | 1000 | ns | Within PWD limit | 4 | ||
| Data Rate (3.3 V, A grade) | 1 | Mbps | Within PWD limit | 4 | |||
| Propagation Delay (3.3 V, A grade) | tPHL, tPLH | 50 | ns | 50% input to 50% output | 4 | ||
| Pulse Width Distortion (3.3 V, A grade) | PWD | 10 | ns | /tPLH − tPHL/ | 4 | ||
| Pulse Width Distortion Change vs. Temperature (3.3 V, A grade) | 7 | ps/°C | 4 | ||||
| Propagation Delay Skew (3.3 V, A grade) | tPSK | 38 | ns | Between any two units at same operating conditions | 4 | ||
| Channel Matching Codirectional (3.3 V, A grade) | tPSKCD | 5 | ns | 4 | |||
| Channel Matching Opposing-Direction (3.3 V, A grade) | tPSKOD | 10 | ns | 4 | |||
| Jitter (3.3 V, A grade) | 2 | ns | 4 | ||||
| Supply Current IDD1 (ADuM1286, 3.3 V, 1 Mbps) | IDD1 | 1.6 | 2.1 | mA | No load; 1 Mbps | 4 | |
| Supply Current IDD2 (ADuM1286, 3.3 V, 1 Mbps) | IDD2 | 1.7 | 2.3 | mA | No load; 1 Mbps | 4 | |
| Logic Low Output Voltage (3.3 V) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 5 | |
| Logic Low Output Voltage (3.3 V) | VOL | 0.2 | 0.4 | V | IOx = 3.2 mA, VIx = VIxL | 5 | |
| Input Current per Channel (3.3 V) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 5 |
| Quiescent Input Supply Current (3.3 V) | IDDI(Q) | 0.4 | 0.6 | mA | 5 | ||
| Quiescent Output Supply Current (3.3 V) | IDDO(Q) | 1.2 | 1.7 | mA | 5 | ||
| Output Rise/Fall Time (3.3 V) | tR/tF | 3 | ns | 10% to 90% | 5 | ||
| Logic High Output Voltage (5 V) | VOH | 5 | V | IOx = −20 µA, VIx = VIxH | 3 | ||
| Logic High Output Voltage (5 V) | VOH | 4.8 | V | IOx = −3.2 mA, VIx = VIxH | 3 | ||
| Dynamic Input Supply Current (5 V) | IDDI(D) | 0.09 | mA/Mbps | 3 | |||
| Dynamic Output Supply Current (5 V) | IDDO(D) | 0.04 | mA/Mbps | 3 | |||
| Positive VDDx Undervoltage Lockout Threshold (5 V) | VDDxUV+ | 2.75 | V | 4 | |||
| Negative VDDx Undervoltage Lockout Threshold (5 V) | VDDxUV− | 2.65 | V | 4 | |||
| VDDx Undervoltage Lockout Hysteresis (5 V) | VDDxUVH | 0.1 | V | 4 | |||
| IC Junction-to-Ambient Thermal Resistance | θJA | 85 | °C/W | Thermocouple located at center of package underside | 8 | ||
| Capacitance (Input-to-Output) | CI-O | 2 | pF | f = 1 MHz | 8 | ||
| Input Capacitance | CI | 4 | pF | Input capacitance is from any input data pin to ground | 8 | ||
| Logic High Output Voltage (3.3 V) | VOH | 3 | V | IOx = −20 µA, VIx = VIxH | 5 | ||
| Logic High Output Voltage (3.3 V) | VOH | 2.8 | V | IOx = −3.2 mA, VIx = VIxH | 5 | ||
| Dynamic Input Supply Current (3.3 V) | IDDI(D) | 0.08 | mA/Mbps | 5 | |||
| Dynamic Output Supply Current (3.3 V) | IDDO(D) | 0.015 | mA/Mbps | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM1280/ADuM1281/ADuM1285/ADuM1286 is proof tested by applying an insulation test voltage ≥ 1050 VPEAK for 1 second (partial discharge detec | 8 |
CAD (KiCad official)
- Symbol:
ADUM1286ARZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adum1286arz-etched.step/adum1286arz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum1286arz.step/adum1286arz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (18 pp, sha256
9143762bd346e43a, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).